lh28f008sc-v Sharp Microelectronics of the Americas, lh28f008sc-v Datasheet - Page 10
![no-image](/images/no-image-200.jpg)
lh28f008sc-v
Manufacturer Part Number
lh28f008sc-v
Description
8 M-bit 1 Mb X 8 Smart 5 Flash Memories
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LH28F008SC-V.pdf
(40 pages)
NOTES :
1. Refer to Section 6.2.3 "DC CHARACTERISTICS".
2. X can be V
3. RY/BY# is V
Read
Output Disable
Standby
Deep Power-Down
Read Identifier Codes
Write
When V
not altered.
V
CHARACTERISTICS" for V
block erase, byte write, or lock-bit configuration
algorithms. It is V
in block erase suspend mode (with byte write inactive),
byte write suspend mode, or deep power-down mode.
PPLK
MODE
or V
PP
≤ V
IL
PPH1/2
or V
OL
PPLK
when the WSM is executing internal
OH
IH
, memory contents can be read, but
for V
for control pins and addresses, and
during when the WSM is not busy,
PP
1, 2, 3, 8 V
3, 6, 7, 8 V
NOTE
PPLK
. See Section 6.2.3 "DC
3
3
4
8
and V
V
V
V
IH
IH
IH
IH
IH
PPH1/2
RP#
V
or V
or V
or V
or V
or V
IL
HH
HH
HH
HH
HH
Table 2 Bus Operations
voltages.
CE#
V
V
V
V
V
X
IH
IL
IL
IL
IL
- 10 -
OE#
V
V
V
V
X
X
4. RP# at GND±0.2 V ensures the lowest deep power-
5. See Section 4.2 for read identifier code data.
6. Command writes involving block erase, byte write, or
7. Refer to Table 3 for valid D
8. Don
IH
IH
IL
IL
down current.
lock-bit configuration are reliably executed when V
V
lock-bit configuration with V
spurious results and should not be attempted.
PPH1/2
’
WE#
t use the timing both OE# and WE# are V
V
V
V
V
X
X
IH
IH
IH
IL
and V
See Fig. 2
ADDRESS
CC
X
X
X
X
X
= V
CC1/2
LH28F008SC-V/SCH-V
. Block erase, byte write, or
V
IN
X
X
X
X
X
X
PP
IH <
during a write operation.
RP# < V
(NOTE 5)
High Z
High Z
High Z
DQ
D
D
OUT
IN
0-7
HH
RY/BY#
IL
produce
.
V
V
X
X
X
X
OH
OH
PP
=