lh28f008sc-v Sharp Microelectronics of the Americas, lh28f008sc-v Datasheet - Page 35
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lh28f008sc-v
Manufacturer Part Number
lh28f008sc-v
Description
8 M-bit 1 Mb X 8 Smart 5 Flash Memories
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LH28F008SC-V.pdf
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6.2.7 RESET OPERATIONS
NOTES :
1. These specifications are valid for all product versions
2. If RP# is asserted while a block erase, byte write, or
SYMBOL
t
t
t
PLPH
PLRH
5VPH
(packages and speeds).
lock-bit configuration operation is not executing, the reset
will complete within 100 ns.
RY/BY# (R)
RY/BY# (R)
RP# Pulse Low Time (If RP# is tied to V
this specification is not applicable)
RP# Low to Reset during Block Erase,
Byte Write or Lock-Bit Configuration
V
RP# (P)
RP# (P)
RP# (P)
CC
V
4.5 V to RP# High
CC
V
V
V
V
V
V
V
V
V
V
V
5 V
OH
OL
IH
IL
OH
OL
IH
IL
IL
IH
IL
PARAMETER
Fig. 15 AC Waveform for Reset Operation
t
t
PLPH
PLPH
(A) Reset During Read Array Mode
(B) Reset During Block Erase, Byte Write, or Lock-Bit Configuration
(C) RP# Rising Timing
Reset AC Specifications
t
5VPH
t
PLRH
CC
,
- 35 -
3. A reset time, t
4. When the device power-up, holding RP#-low minimum
NOTE
or RP# going high until outputs are valid.
100 ns is required after V
range and also has been in stable there.
2, 3
4
(NOTE 1)
PHQV
MIN.
100
100
, is required from the latter of RY/BY#
V
CC
= 5.0±0.5 V
LH28F008SC-V/SCH-V
CC
has been in predefined
MAX.
12
UNIT
ns
µs
ns
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