lh28f016sct-zr Sharp Microelectronics of the Americas, lh28f016sct-zr Datasheet - Page 6

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lh28f016sct-zr

Manufacturer Part Number
lh28f016sct-zr
Description
Flash Memory 16mbit 2mbitx8
Manufacturer
Sharp Microelectronics of the Americas
Datasheet

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Part Number
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Part Number:
LH28F016SCT-ZR
Manufacturer:
SHARP
Quantity:
5 000
1 INTRODUCTION
This
specifications. Section 1 provides a flash memory
overview. Sections 2, 3, 4, and 5 describe the
memory organization and functionality. Section 6
covers electrical specifications. LH28F016SCT-ZR
Flash
application notes and design tools which are
referenced in Section 7.
1.1 New Features
The LH28F016SCT-ZR SmartVoltage Flash memory
maintains backwards-compatibility with SHARP’s
28F008SA. Key enhancements over the 28F008SA
include:
Both devices share a compatible pinout, status
register,
similarities enable a clean upgrade from the
28F008SA to LH28F016SCT-ZR. When upgrading, it
is important to note the following differences:
1.2 Product Overview
The
16M-bit SmartVoltage Flash memory organized as
2M-byte of 8 bits. The 2M-byte of data is arranged in
thirty-two 64K-byte blocks which are individually
erasable, lockable, and unlockable in-system. The
memory map is shown in Figure 3.
•SmartVoltage Technology
•Enhanced Suspend Capabilities
•In-System Block Locking
•Because of new feature support, the two devices
•V
•To take advantage of SmartVoltage technology,
have different device codes. This allows for
software optimization.
support 3.3V and 5V block erase, byte write, and
lock-bit configuration operations. The V
transitions to GND is recommended for designs
that switch V
allow V
PPLK
LH28F016SCT-ZR
datasheet
memory
PP
has been lowered from 6.5V to 1.5V to
and
connection to 3.3V or 5V.
PP
software
off during read operation.
documentation
contains
is
command
a
LH28F016SCT-ZR
high-performance
also
set.
PP
includes
voltage
These
LHF16CZR
SmartVoltage technology provides a choice of V
and V
system performance and power expectations. 2.7V
V
5V V
performance. V
for a separate 12V converter, while V
maximizes block erase and byte write performance.
In addition to flexible erase and program voltages,
the dedicated V
when V
NOTE:
1. Block erase, byte write and lock-bit configuration
Internal
automatically configures the device for optimized
read and write operations.
A Command User Interface (CUI) serves as the
interface between the system processor and internal
operation of the device. A valid command sequence
written to the CUI initiates device automation. An
internal Write State Machine (WSM) automatically
executes the algorithms and timings necessary for
block erase, byte write, and lock-bit configuration
operations.
A block erase operation erases one of the device’s
64K-byte blocks typically within 0.3s (5V V
V
independently erased 100,000 times (3.2 million
block erases per device). Block erase suspend mode
allows system software to suspend block erase to
read or write data from any other block.
Writing memory data is performed in byte increments
typically within 6µs (5V V
suspend mode enables the system to read data or
execute code from any other flash memory array
location.
CC
PP
Table 1. V
operations with V
) independent of other blocks. Each block can be
consumes approximately one-fifth the power of
CC
PP
Offered by SmartVoltage Technology
V
PP
. But, 5V V
CC
combinations, as shown in Table 1, to meet
≤V
2.7V
V
3.3V
Voltage
5V
CC
PPLK
CC
(1)
PP
PP
.
and V
at 3.3V and 5V eliminates the need
and
pin gives complete data protection
CC
CC
<3.0V are not supported.
PP
V
provides the highest read
Voltage Combinations
PP
CC
, 12V V
detection
3.3V, 5V, 12V
V
PP
5V, 12V
PP
Voltage
). Byte write
Rev. 1.2
CC
Circuitry
PP
, 12V
=12V
CC
3

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