hyb18t512160bf-3 Qimonda, hyb18t512160bf-3 Datasheet - Page 13

• Manufacturer Part Number: hyb18t512160bf-3
• Description: 512-mbit Double-data-rate-two Sdram Ddr2 Sdram
• Manufacturer: Qimonda

Rev. 1.2, 2007-11
03292006-YBYM-WG0Z
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Abbreviation
SSTL
LV-CMOS
CMOS
OD
Description
Standard input-only ball. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
Description
Serial Stub Terminated Logic (SSTL_18)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding ball has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR.
13
512-Mbit Double-Data-Rate-Two SDRAM
Abbreviations for Buffer Type
Abbreviations for Ball Type
HYB18T512[40/80/16]0BF
Internet Data Sheet
TABLE 7
TABLE 8