m29f040 STMicroelectronics, m29f040 Datasheet - Page 12

• Manufacturer Part Number: m29f040
• Description: 4 Mbit 512kb X8, Uniform Block Single Supply Flash Memory
• Manufacturer: STMicroelectronics

M29F040
Table 12B. Read AC Characteristics
(T
Notes: 1. Sampled only, not 100% tested.
12/31
Program (PG) instruction. The memory can be
programmed Byte-by-Byte. This instruction uses
four write cycles. The Program command A0h is
written on the third cycle after two coded cycles. A
fourth write operation latches the Address on the
falling edge of W or E and the Data to be written
on its rising edge and starts the P/E.C. During the
execution of the program by the P/E.C., the mem-
ory will not accept any instruction. Read operations
output the status bits after the programming has
started. The status bits DQ5, DQ6 and DQ7 allow
a check of the status of the programming operation.
Memory programming is made only by writing ’0’ in
place of ’1’ in a Byte.
Erase Suspend (ES) instruction. The Block
Erase operation may be suspended by this instruc-
tion which consists of writing the command 0B0h
without any specific address code. No coded cycles
are required. It allows reading of data from another
Symbol
t
t
t
t
t
t
GHQZ
A
ELQX
ELQV
GLQX
GLQV
EHQZ
t
t
t
t
t
GHQX
AVQV
EHQX
AXQX
AVAV
= 0 to 70 C, –20 to 85 C, –40 to 85 C or –40 to 125 C)
2. G may be delayed by up to t
(1)
(2)
(1)
(2)
(1)
(1)
t
t
Alt
t
t
t
t
t
ACC
t
t
t
t
OLZ
RC
OE
OH
OH
OH
CE
HZ
DF
LZ
Address Valid to Next Address Valid
Address Valid to Output Valid
Chip Enable Low to Output Transition
Chip Enable Low to Output Valid
Output Enable Low to Output
Transition
Output Enable Low to Output Valid
Chip Enable High to Output
Transition
Chip Enable High to Output Hi-Z
Output Enable High to Output
Transition
Output Enable High to Output Hi-Z
Address Transition to Output
Transition
Parameter
ELQV
- t
GLQV
after the falling edge of E without increasing t
Test Condition
E = V
E = V
E = V
block while erase is in progress. Erase suspend is
accepted only during the Block Erase instruction
execution and defaults to read array mode. Writing
this command during Erase timeout will, in addition
to suspending the erase, terminate the timeout.
The Toggle Bit DQ6 stops toggling when the P/E.C.
is suspended. Toggle Bit status must be monitored
at an address out of the block being erased. Toggle
Bit will stop toggling between 0.1 s and 15 s after
the Erase Suspend (ES) command has been writ-
ten.
The M29F040 will then automatically set to Read
Memory Array mode. When erase is suspended,
Read from blocks being erased will output invalid
data, Read from block not being erased is valid.
During the suspension the memory will respond
only to Erase Resume (ER) and Reset (RST) in-
structions. RST command will definitively abort
erasure and result in the invalid data in the blocks
being erased.
G = V
G = V
E = V
E = V
G = V
G = V
E = V
E = V
IL
IL
IL
, G = V
, G = V
, G = V
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
V
CC
Min
120
20
0
0
0
0
Standard
Interface
ELQV
= 5V
-120
.
Max
120
120
50
30
30
10% V
M29F040
CC
Min
150
20
0
0
0
0
Standard
Interface
= 5V
-150
Max
150
150
55
35
35
10%
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns