s-24c128ci-t8t1u3 Seiko Instruments Inc., s-24c128ci-t8t1u3 Datasheet - Page 16

• Manufacturer Part Number: s-24c128ci-t8t1u3
• Description: 2-wire Serial Eeprom S-24c128c 128k-bit
• Manufacturer: Seiko Instruments Inc.

16
2-WIRE CMOS SERIAL E
S-24C128C
7. Read
7. 1 Current Address Read
Either in writing or in reading the S-24C128C holds the last accessed memory address. The memory address
is maintained as long as the power voltage does not decrease less than the operating voltage.
The master device can read the data at the memory address of the current address pointer without assigning
the word address as a result, when it recognizes the position of the address pointer in the S-24C128C. This is
called “Current Address Read”.
In the following the address counter in the S-24C128C is assumed to be “n”.
When the S-24C128C receives a 7-bit device address and a 1-bit read / write instruction code set to “1”
following a start condition, it responds with an acknowledge.
Next, an 8-bit data at the address “n” is sent from the S-24C128C synchronous to the SCL clock. The address
counter is incremented and the content of the address counter becomes n 1.
The master device outputs stop condition not an acknowledge, the reading of S-24C128C is ended.
Attention should be paid to the following point on the recognition of the address pointer in the S-24C128C.
In Read, the memory address counter in the S-24C128C is automatically incremented after output of the 8th bit
of the data. In Write, on the other hand, the upper bits of the memory address (the upper bits of the word
address
1. The upper 8 bits of the word address
*1
) are left unchanged and are not incremented.
SDA LINE
2
PROM
R
S
T
A
T
M
S
B
1 0 1 0
Figure 16 Current Address Read
ADDRESS
DEVICE
Seiko Instruments Inc.
A2 A1 A0
S
B
L
W
R
1
R
D
/
E
A
C
A
K
D7 D6 D5 D4 D3 D2 D1 D0
Master Device
NO ACK from
DATA
O
S
T
P
Rev.2.0
_00_H