tza3034 NXP Semiconductors, tza3034 Datasheet - Page 6

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tza3034

Manufacturer Part Number
tza3034
Description
Sdh/sonet Stm1/oc3 Postamplifier
Manufacturer
NXP Semiconductors
Datasheet

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The relationship between the threshold current and the
detected input voltage is approximately:
In the formulas (1) and (3), the voltage on pin DIN and
pin DINQ is measured as peak-to-peak value.
Since the voltage on pin RSET is held constant at 1.5 V
below V
Combining these two formulas results in a general formula
to calculate R
Example: Detection should occur if the differential voltage
of the input signals drops below 4 mV (p-p). In this case, a
reference current of 0.0018
into pin RSET. This can be set using a current source or
simply by connecting a resistor of the appropriate value.
The resistor must be connected between V
pin RSET. In this example the value would be:
The hysteresis is fixed internally at 3 dB electrical. In the
example of above, a differential level below 4 mV (p-p) of
the input signal will drive pin ST to LOW, and an input
signal level above 5.7 mV (p-p) will drive pin ST to HIGH.
A function is provided to automatically disable the signal
transmission when the chip senses that the input signal is
below the programmed threshold level. This function can
be put into operation by connecting pin JAM with pin STQ.
When the input signal is below the programmed threshold
level, the data outputs are then forced to a predetermined
state (pin DOUT = LOW and pin DOUTQ = HIGH).
Response time of the input signal level detection circuit is
determined by the time constant of the input capacitors,
together with the filter time constant (1 s internal plus the
additional capacitor at pin CF). For SDH/SONET
applications, couple capacitors of 1.5 nF are
recommended, leading to a high-pass frequency of
approximately 30 kHz and a maximum assert time of
30 s.
1999 Nov 03
I
R
R
I
RSET
RSET
ADJ
ADJ
SDH/SONET STM1/OC3 postamplifier
=
=
=
=
CCA
--------------------------------------- -
-------------- -
0.004
------------ - A
R
V
830
0.0018
1.5
ADJ
DIN
, the current flowing into this pin will be:
ADJ
830
=
V
for a given input signal level detection:
207.5 k
DINQ
V
DIN
V
DINQ
0.004 = 7.2 A should flow
A
CCA
and
(1)
(2)
(3)
6
the maximum operating temperature.
For the TZA3034TT (TSSOP package), the worst case die
temperature T
than the maximum operating temperature, and therefore
strongly discouraged. It is recommended to lower the
thermal resistance from junction to ambient, e.g. by means
of a dedicated board layout.
However, if the ambient temperature is limited to 75 C or
the power supply is limited to 3.3 0.3 V, the junction
temperature will stay below the maximum value without
further precautions.
PECL output circuits
The output circuit of ST and STQ is given in Fig.7.
The output circuit of DOUT and DOUTQ is given in Fig.8.
Some PECL termination schemes are given in Fig.9.
Dissipation
Since the thermal resistance from junction to ambient
R
resistance of the SO package (see Chapter “Thermal
characteristics”), the dissipation should be considered
when using the TZA3034TT version.
The formula to calculate the worst case die temperature is:
where
For the TZA3034T (SO package), the worst case die
temperature T
T
th(j-a)
j
T
T
R
P
=
j
amb
max
th(j-a)
= junction temperature
T
of the TSSOP package is higher than the thermal
amb
= ambient temperature
= maximum power dissipation.
= thermal resistance from junction to ambient
+
R
j
j
th j a
= 85 + 115
= 85 + 150
P
max
0.3 = 119.5 C which is below
0.3 = 130 C which is higher
Product specification
TZA3034
(4)

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