lm2756tmx National Semiconductor Corporation, lm2756tmx Datasheet - Page 9

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lm2756tmx

Manufacturer Part Number
lm2756tmx
Description
Multi-display Inductorless Led Driver With 32 Exponential Dimming Steps In ?smd
Manufacturer
National Semiconductor Corporation
Datasheet
Circuit Description
OVERVIEW
The LM2756 is a white LED driver system based upon an
adaptive 3/2× - 1× CMOS charge pump capable of supplying
up to 180mA of total output current. With three separately
controlled Groups of constant current sinks, the LM2756 is an
ideal solution for platforms requiring a single white LED driver
for main display, sub display, and indicator lighting. The tightly
matched current sinks ensure uniform brightness from the
LEDs across the entire small-format display.
Each LED is configured in a common anode configuration,
with the peak drive current being programmed through the
use of an external R
is used to enable the device and vary the brightness within
the individual current sink Groups. For GroupA , 32 exponen-
tially-spaced analog brightness control levels are available.
GroupB and GroupC have 8 linearly-spaced analog bright-
ness levels.
CIRCUIT COMPONENTS
Charge Pump
The input to the 3/2× - 1× charge pump is connected to the
V
nected to the V
range of the LM2756 is 2.7V to 5.5V. The device’s regulated
charge pump has both open loop and closed loop modes of
operation. When the device is in open loop, the voltage at
V
the device is in closed loop, the voltage at V
to 4.6V (typ.). The charge pump gain transitions are actively
selected to maintain regulation based on LED forward voltage
and load requirements.
LED Forward Voltage Monitoring
The LM2756 has the ability to switch gains (1x or 3/2x) based
on the forward voltage of the LED load. This ability to switch
gains maximizes efficiency for a given load. Forward voltage
monitoring occurs on all diode pins. At higher input voltages,
the LM2756 will operate in pass mode, allowing the V
voltage to track the input voltage. As the input voltage drops,
the voltage on the Dxx pins will also drop (V
V
approximately equal to 150mV, the charge pump will switch
to the gain of 3/2. This switch-over ensures that the current
through the LEDs never becomes pinched off due to a lack of
headroom across the current sinks. Once a gain transition
occurs, the LM2756 will remain in the gain of 3/2 until an
I
re-evaluate the LED conditions and select the appropri-
ate gain.
Only active Dxx pins will be monitored. For example, if only
GroupA is enabled, the LEDs in GroupB or GroupC will not
affect the gain transition point. If all 3 Groups are enabled, all
diodes will be monitored, and the gain transition will be based
upon the diode with the highest forward voltage.
Configurable Gain Transition Delay
To optimize efficiency, the LM2756 has a user selectable gain
transition delay that allows the part to ignore short duration
input voltage drops. By default, the LM2756 will not change
gains if the input voltage dip is shorter than 3 to 6 milliseconds.
There are four selectable gain transition delay ranges avail-
able on the LM2756. All delay ranges are set within the VF
Monitor Delay Register . Please refer to the INTERNAL REG-
2
IN
OUT
LEDx
C write to the part occurs. At that time, the LM2756 will
pin, and the regulated output of the charge pump is con-
is equal to the gain times the voltage at the input. When
). Once any of the active Dxx pins reaches a voltage
OUT
SET
pin. The recommended input voltage
resistor. An I
2
C compatible interface
OUT
DXX
is regulated
= V
VOUT
OUT
9
ISTERS section of this datasheet for more information re-
garding the delay ranges.
HWEN Pin
The LM2756 has a hardware enable/reset pin (HWEN) that
allows the device to be disabled by an external controller
without requiring an I
ation, the HWEN pin should be held high (logic '1') to prevent
an unwanted reset. When the HWEN is driven low (logic '0'),
all internal control registers reset to the default states and the
part becomes disabled. Please see the Electrical Character-
istics section of the datasheet for required voltage thresholds.
I
DATA VALIDITY
The data on SDIO line must be stable during the HIGH period
of the clock signal (SCL). In other words, state of the data line
can only be changed when SCL is LOW.
A pull-up resistor between the controller's VIO line and SDIO
must be greater than [ (VIO-V
requirement on SDIO. Using a larger pull-up resistor results
in lower switching current with slower edges, while using a
smaller pull-up results in higher switching currents with faster
edges.
START AND STOP CONDITIONS
START and STOP conditions classify the beginning and the
end of the I
signal transitioning from HIGH to LOW while SCL line is
HIGH. A STOP condition is defined as the SDIO transitioning
from LOW to HIGH while SCL is HIGH. The I
generates START and STOP conditions. The I
sidered to be busy after a START condition and free after a
STOP condition. During data transmission, the I
can generate repeated START conditions. First START and
repeated START conditions are equivalent, function-wise.
TRANSFERING DATA
Every byte put on the SDIO line must be eight bits long, with
the most significant bit (MSB) transferred first. Each byte of
data has to be followed by an acknowledge bit. The acknowl-
edge related clock pulse is generated by the master. The
2
C Compatible Interface
FIGURE 2. Start and Stop Conditions
2
C session. A START condition is defined as SDIO
FIGURE 1. Data Validity Diagram
2
C write command. Under normal oper-
OL
) / 3.5mA] to meet the V
2
C master always
2
C bus is con-
www.national.com
2
C master
30009725
30009711
OL

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