tle4998s Infineon Technologies Corporation, tle4998s Datasheet - Page 17

• Manufacturer Part Number: tle4998s
• Description: Tle4998s/p-programming Guide
• Manufacturer: Infineon Technologies Corporation

Table 8
Parameter
OUT input current
OUT margin level
Threshold margin level
Margin setup time
V
OUT program level
OUT prog. slope (rise)
OUT prog. slope (fall)
OUT write time
OUT erase time
1) When V
2) Proper command must be applied first to switch off internal output stage of device.
3) Level range within which programmed EEPROM bits start to flip from ones to zeros - to be checked after
4) To check the programmed ‘0’ threshold levels, the “Margin zero on” bit needs to be set to ‘1’ in the test register
5) To improve the margin accuracy, the last falling clock edge must be slowed down for the margin command.
6) Time to reach V
7) Time to reach 1V max. must not exceed 50µs
8) Ramp up/down needs to be assured by the programming hardware - especially faster slopes, when applying
Application Note
dd
programming:
- a too low value could be given by too short programming pulse or a too low programming voltage
- a too high value could be given by a too long programming pulse or a too high programming voltage
To check the programmed ‘1’ threshold levels, the “Margin zero on” bit needs to be set to ‘0’ in the test register
the programming voltage, may damage the EEPROM cell.
slope for margin
o,prog
or V
Electrical levels and interface timing
O,PROG
o,marg
is applied.
min. must not exceed 50µs
Symbol
I
V
V
t
V
V
V
V
t
t
MARG
PROG,WR
PROG,ER
O
O,MARG
TH
dd
O,PROG
O,PROG
O,PROG
/t
/t
/t
Limit Values
min.
0
-0.1
2.23
200
100
19.2
6)
-10
9.9
79.2
15
typ.
200
19.3
10.0
80.0
TLE4998S/P-Programming Guide
max.
5
7
4.5
0.4
300
19.4
2
7)
10.1
80.8
Interface Access Details - Part II
Unit
mA
V
V
V
µs
mV/µs falling edge
V
V/µs
V/µs
ms
ms
Notes
1)
2)
check ’1’
check ’0’
low tolerance!
7)
8)
V 1.1, 2008-08
3)
4)
5)
2)