tle4998s Infineon Technologies Corporation, tle4998s Datasheet - Page 21

• Manufacturer Part Number: tle4998s
• Description: Tle4998s/p-programming Guide
• Manufacturer: Infineon Technologies Corporation

• LOCKED must be ’0’ as long as the lockbits are not programmed. Newly programmed
• perr_adr must be on address 0xF (=”1111”) otherwise it shows the first EEPROM
• perr_more must be ’0’, otherwise more than one EEPROM address (=lines) has a
• perr_col must be ’0’, otherwise one or more EEPROM columns have a parity error.
• HWver contains the actual silicon revision (for the TLE4998S/P A11, this number is
• ROMSIG must be 0x15 (=”10101”) otherwise the DSP ROM is not valid and the device
To summarize, for a sensor without defects and appropriate parity programming, the
status register should have the setting 0xA83D for the TLE4998S/P.
4.2.7
The content of the test register is shown in
Figure 16
All bits are ’0’ after reset. All bits not described or used must kept at ’0’.
• “Margin zero on” needs to be set to ‘1’ for testing the EEPROM threshold voltages of
• “FEC off” switches off the error correction of the EEPROM. This bit should be set when
• “REF off” switches off the automatic (cyclic) refresh performed by the DSP to actualize
• “DSP off” switches off the signal processor immediately. This bit must be set prior to
Application Note
lock bits effect the LOCKED bit after the next power cycle. A locked interface indicates
that the chip has been locked successfully.
address (=line) where the internal parity check failed.
parity error.
set to “000”).
itself is defective.
cells programmed to ‘0’. The bit has to be set to ‘0’ if the EEPROM threshold voltages
of cells programmed to ‘1’ are tested
reading the EEPROM content to ensure to retreive the real data stored in the
EEPROM (address range 0x10 to 0x1A)
the EEPROM registers from the EEPROM cells. When writing new values to the
EEPROM registers this bit must be set, otherwise these values will be always
overwritten by the EEPROM content
access the internal register values via the interface (H_CAL, T_CAL and EEPROM).
MSB
15
TEST
14
Test register
13
12
11
10
9
8
19
Figure
7
TLE4998S/P-Programming Guide
6
16.
5
Interface Access Details - Part III
4
3
2
1
LSB
0
V 1.1, 2008-08