tmp88ch41ug TOSHIBA Semiconductor CORPORATION, tmp88ch41ug Datasheet - Page 171

• Manufacturer Part Number: tmp88ch41ug
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

16.4 Number of bits to transfer
16.5 Number of words to transfer
16.3.2 Shift edge
the transmit/receive data buffer register are used. The upper 4 bits are cleared to “0” when receiving.
The data is transferred in sequence starting at the least significant bit (LSB).
ferred continuously. The number of words to be transferred can be selected by SIOCR2<BUF>.
words is to be changed during transfer, the serial interface must be stopped before making the change. The number of
words can be changed during automatic-wait operation of an internal clock. In this case, the serial interface is not
required to be stopped.
16.3.2.1 Leading edge
16.3.2.2 Trailing edge
Either 4-bit or 8-bit serial transfer can be selected. When 4-bit serial transfer is selected, only the lower 4 bits of
Up to 8 words consisting of 4 bits of data (4-bit serial transfer) or 8 bits (8-bit serial transfer) of data can be trans-
An INTSIO interrupt is generated when the specified number of words has been transferred. If the number of
The leading edge is used to transmit, and the trailing edge is used to receive.
output).
put).
Transmitted data are shifted on the leading edge of the serial clock (falling edge of the
Received data are shifted on the trailing edge of the serial clock (rising edge of the
SCK pin
SCK pin
SO pin
SI pin
Shift register
Shift register
****
Figure 16-5 Shift edge
3210
Bit 0
Bit 0
(a) Leading edge
(b) Trailing edge
0 ***
* 321
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Bit 1
Bit 1
10 **
Bit 2
** 32
Bit 2
210 *
Bit 3
*** 3
Bit 3
3210
* ; Don’t care
SCK
TMP88FH41UG
SCK
pin input/out-
pin input/