attiny25v ATMEL Corporation, attiny25v Datasheet - Page 125

• Manufacturer Part Number: attiny25v
• Description: Microcontroller With 2/4/8k Bytes In-system Programmable Flash
• Manufacturer: ATMEL Corporation

16.2.3
2586K–AVR–01/08
DIDR0 – Digital Input Disable Register 0
• Bits 1, 0 – ACIS1, ACIS0: Analog Comparator Interrupt Mode Select
These bits determine which comparator events that trigger the Analog Comparator interrupt. The
different settings are shown in
Table 16-2.
When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be disabled by
clearing its Interrupt Enable bit in the ACSR Register. Otherwise an interrupt can occur when the
bits are changed.
• Bits 1, 0 – AIN1D, AIN0D: AIN1, AIN0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the AIN1/0 pin is disabled. The corre-
sponding PIN Register bit will always read as zero when this bit is set. When an analog signal is
applied to the AIN1/0 pin and the digital input from this pin is not needed, this bit should be writ-
ten logic one to reduce power consumption in the digital input buffer.
Bit
0x14
Read/Write
Initial Value
ACIS1
0
0
1
1
ACIS1/ACIS0 Settings
7
–
R
0
ACIS0
0
1
0
1
6
–
R
0
Interrupt Mode
Comparator Interrupt on Output Toggle.
Reserved
Comparator Interrupt on Falling Output Edge.
Comparator Interrupt on Rising Output Edge.
Table
5
ADC0D
R/W
0
16-2.
4
ADC2D
R/W
0
3
ADC3D
R/W
0
2
ADC1D
R/W
0
ATtiny25/45/85
1
AIN1D
R/W
0
0
AIN0D
R/W
0
DIDR0
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