dspic33fj16gs404t-i-pt Microchip Technology Inc., dspic33fj16gs404t-i-pt Datasheet - Page 203

• Manufacturer Part Number: dspic33fj16gs404t-i-pt
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

REGISTER 15-2:
REGISTER 15-3:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-3
bit 2-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
Note 1: These bits should be changed only when PTEN = 0. Changing the clock selection during operation will
Note 1: The minimum value that can be loaded into the PTPER register is 0x0010 and the maximum value is
R/W-1
R/W-1
U-0
U-0
—
—
yield unpredictable results.
0xFFF8.
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
Unimplemented: Read as ‘0’
PCLKDIV<2:0>: PWM Input Clock Prescaler (Divider) Select bits
000 = Divide by 1, maximum PWM timing resolution (power-on default)
001 = Divide by 2, maximum PWM timing resolution
010 = Divide by 4, maximum PWM timing resolution
011 = Divide by 8, maximum PWM timing resolution
100 = Divide by 16, maximum PWM timing resolution
101 = Divide by 32, maximum PWM timing resolution
110 = Divide by 64, maximum PWM timing resolution
111 = Reserved
PTPER<15:0>: PWM Master Time Base (PMTMR) Period Value bits
R/W-1
R/W-1
U-0
U-0
—
—
PTCON2: PWM CLOCK DIVIDER SELECT REGISTER
PTPER: PWM MASTER TIME BASE REGISTER
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
R/W-1
R/W-1
U-0
U-0
—
—
R/W-1
R/W-1
U-0
U-0
Preliminary
—
—
PTPER <15:8>
PTPER <7:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
R/W-1
U-0
U-0
—
—
R/W-0
R/W-1
R/W-0
(1)
U-0
—
(1)
PCLKDIV<2:0>
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-1
R/W-0
U-0
—
DS70318D-page 201
(1)
R/W-0
R/W-1
R/W-0
U-0
—
bit 8
bit 0
bit 8
bit 0