dspic33fj16gs404t-i-pt Microchip Technology Inc., dspic33fj16gs404t-i-pt Datasheet - Page 253

• Manufacturer Part Number: dspic33fj16gs404t-i-pt
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

REGISTER 19-6:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
IRQEN3
IRQEN2
Note 1: These bits are available in the dsPIC33FJ16GS402/404, dsPIC33FJ16GS504, dsPIC33FJ16GS502 and
R/W-0
R/W-0
2: These bits are available in the dsPIC33FJ16GS502, dsPIC33FJ16GS504, dsPIC33FJ06GS102,
3: If other conversions are in progress, then conversion will be performed when the conversion resources are
(1)
(2)
dsPIC33FJ06GS101 devices only.
dsPIC33FJ06GS202 and dsPIC33FJ16GS402/404 devices only.
available.
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
IRQEN3: Interrupt Request Enable 3 bit
1 = Enable IRQ generation when requested conversion of channels AN7 and AN6 is completed
0 = IRQ is not generated
PEND3: Pending Conversion Status 3 bit
1 = Conversion of channels AN7 and AN6 is pending. Set when selected trigger is asserted
0 = Conversion is complete
SWTRG3: Software Trigger 3 bit
1 = Start conversion of AN7 and AN6 (if selected in TRGSRC bits)
This bit is automatically cleared by hardware when the PEND3 bit is set.
0 = Conversion is not started
PEND3
PEND2
R/W-0
R/W-0
ADCPC1: A/D CONVERT PAIR CONTROL REGISTER 1
(1)
(2)
W = Writable bit
‘1’ = Bit is set
SWTRG3
SWTRG2
R/W-0
R/W-0
(1)
(2)
R/W-0
R/W-0
(1)
Preliminary
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
TRGSRC3<4:0>
TRGSRC2<4:0>
R/W-0
R/W-0
(3)
(1)
(2)
x = Bit is unknown
R/W-0
R/W-0
DS70318D-page 251
R/W-0
R/W-0
bit 8
bit 0