at91sam7x256 ATMEL Corporation, at91sam7x256 Datasheet - Page 35

• Manufacturer Part Number: at91sam7x256
• Description: Preliminary Summary
• Manufacturer: ATMEL Corporation

10.6
10.7
10.8
6120ES–ATARM–08-Oct-07
Ethernet MAC
Serial Peripheral Interface
Two-wire Interface
• DMA Master on Receive and Transmit Channels
• Compatible with IEEE Standard 802.3
• 10 and 100 Mbit/s operation
• Full- and half-duplex operation
• Statistics Counter Registers
• MII/RMII interface to the physical layer
• Interrupt generation to signal receive and transmit completion
• 28-byte transmit FIFO and 28-byte receive FIFO
• Automatic pad and CRC generation on transmitted frames
• Automatic discard of frames received with errors
• Address checking logic supports up to four specific 48-bit addresses
• Support Promiscuous Mode where all valid received frames are copied to memory
• Hash matching of unicast and multicast destination addresses
• Physical layer management through MDIO interface
• Half-duplex flow control by forcing collisions on incoming frames
• Full-duplex flow control with recognition of incoming pause frames
• Support for 802.1Q VLAN tagging with recognition of incoming VLAN and priority tagged
• Multiple buffers per receive and transmit frame
• Jumbo frames up to 10240 bytes supported
• Supports communication with external serial devices
• Master or slave serial peripheral bus interface
• Master Mode only
• Compatibility with I
frames
– Four chip selects with external decoder allow communication with up to 15
– Serial memories, such as DataFlash
– Serial peripherals, such as ADCs, DACs, LCD Controllers, CAN Controllers and
– External co-processors
– 8- to 16-bit programmable data length per chip select
– Programmable phase and polarity per chip select
– Programmable transfer delays per chip select, between consecutive transfers and
– Programmable delay between consecutive transfers
– Selectable mode fault detection
– Maximum frequency at up to Master Clock
AT91SAM7X512/256/128 Preliminary Summary
peripherals
Sensors
between clock and data
2
C compatible devices (refer to the TWI section of the datasheet)
®
and 3-wire EEPROMs
35