at32ap7000 ATMEL Corporation, at32ap7000 Datasheet - Page 52

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at32ap7000

Manufacturer Part Number
at32ap7000
Description
Avr 32 32-bit Microcontroller
Manufacturer
ATMEL Corporation
Datasheet

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32003KS–AVR32–10/07
18. JTAG CLAMP instruction does not work as intended
19. High current consumption in reset with no clocks enabled
20. TWI transfer error without ACK
21. SSC can not transmit or receive data
22. USART - RXBREAK flag is not correctly handled
23. USART - Manchester encoding/decoding is not working.
During the CLAMP instruction, the Boundary Scan register should be stable and only the
BYPASS register selected. Instead, the bscan register will capture and shift as if it was
selected, reducing the usefulness of the CLAMP instruction.
Fix/Workaround
None.
In connection with the datacache RAM access, a higher current consumption than expected
can be observed during reset. The error is non-functional and does not affect reliability of the
device.
Fix/Workaround
Via software, access the datacache RAM every 100 µs. This prevents the increased current
consumption. Example code:
If the TWI does not receive an ACK from a slave during the address+R/W phase, no bits in
the status register will be set to indicate this. Hence, the transfer will never complete.
Fix/Workaround
To prevent errors due to missing ACK, the software should use a timeout mechanism to ter-
minate the transfer if this happens.
The SSC can not transmit or receive data when CKS = CKDIV and CKO = none in TCMR or
RCMR respectively.
Fix/Workaround
Set CKO to a value that is not "None" and enable the PIO with output driver disabled on the
TK/RK pin.
The FRAME_ERROR is set instead of the RXBREAK when the break character is located
just after the STOP BIT(S) in ASYNCHRONOUS mode.
Fix/Workaround
The transmitting UART must set timeguard greater than 0.
Manchester encoding/decoding is not working.
Fix/Workaround
Do not use manchester encoding.
mov
orh
ld.w
mov
orh
ld.w
r11, lo(0x24002000)
r11, hi(0x24002000)
r11, r11[0]
r10, lo(0x24000000)
r10, hi(0x24000000)
r10, r10[0]
//access first RAM
//access second RAM
AT32AP7000
52

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