at32ap7002 ATMEL Corporation, at32ap7002 Datasheet - Page 47

• Manufacturer Part Number: at32ap7002
• Description: Avr 32 32-bit Microcontroller
• Manufacturer: ATMEL Corporation

11. Datasheet Revision History
11.1
32054DS–AVR32–10/07
Rev. D 09/07
Please note that the referring page numbers in this section are referred to this document. The
referring revision in this section are referring to the document revision.
1.
2.
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5
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10
11.
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PIO Controller C Multiplexing table updated in
Added section
USBA feature list updated in
Renamed clk_slow to clk_osc32 in
Updated organisation of User Interface in
Updated special bus granting mechanism in
Added product dependencies in
Added product dependencies in
Added description of multi-drive in
Added MDER/MDDR/MDSR to pin logic diagram in
page
SPI pins must be enabled to use local loopback.
Updated description of the OVRES bit in
Updated bit description of TXEMPTY in the
Number of chip select lines updatedin figures and tables, changed from 8 to 6 in
Memory Controller (SMC)” on page
Made the MDR register Read/Write instead of Read in
page
Removed the PWSEN and PWSDIS bits from the
Added PDCFBYTE and removed the PWSDIV bits from the
Added note about reading the Status Register clears the interrupt flag in
on page
Added debug operation to product dependencies in
Added debug operation to product dependencies in
(PWM)” on page
Consistently used the term LCDC Core Clock through the document when referring to the
generic clock that drives the LCD Core and is used to generate PCLK and the other LCD
synchronization signals.
Updated typos in
Rewritten the Register Configuration Guide and renamed it “Register Configuration Example“
in
Updated formula for pixel clock in
”LCD Controller (LCDC)” on page
249.
532.
740.
”USBA” on page 81
774.
”LCD Controller (LCDC)” on page
”Peripherals” on page
”DMA Controller (DMACA)” on page
”Peripheral DMA Controller (PDC)” on page
”LCD Control Register 1” on page
”Parallel Input/Output Controller (PIO)” on page
in Clock Connections in
Table 9-4 on page
489.
800.
”SPI Status Register” on page
”HSB Bus Matrix (HMATRIX)” on page
”USART Channel Status Register” on page
”HSB Bus Matrix (HMATRIX)” on page
”Peripherals” on page
”MCI Control Register” on page
75.
”Parallel Input/Output Controller (PIO)” on
”Timer/Counter (TC)” on page
”Pulse Width Modulation Controller
800.
80.
”SDRAM Controller (SDRAMC)” on
”Peripherals” on page
”MCI Mode Register” on page
840.
AT32AP7002
75“.
179.
310.
”Timer/Counter (TC)”
233.
”Static
142.
75.
585.
740.
249.
142.
432.
586.
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