p89lpc930fdh NXP Semiconductors, p89lpc930fdh Datasheet - Page 30

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p89lpc930fdh

Manufacturer Part Number
p89lpc930fdh
Description
8-bit Microcontrollers With Two-clock 80c51 Core 4 Kb/8 Kb 3 V Flash With 256-byte Data Ram
Manufacturer
NXP Semiconductors
Datasheet

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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
P89LPC930FDH
Quantity:
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Philips Semiconductors
9397 750 14472
Product data
8.18 I
I
connected to the bus, and it has the following features:
A typical I
provides a byte-oriented I
2
2
Fig 7. I
C-bus uses two wires (SDA and SCL) to transfer information between devices
C-bus serial interface
Bidirectional data transfer between masters and slaves.
Multimaster bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of
serial data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate
via one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend
and resume serial transfer.
The I
2
C-bus may be used for test and diagnostic purposes.
2
2
C-bus configuration.
C-bus configuration is shown in
I
2
C-BUS
Rev. 05 — 15 December 2004
P1.3/SDA
P89LPC930/931
2
C-bus interface that supports data transfers up to 400 kHz.
P1.2/SCL
8-bit microcontrollers with two-clock 80C51 core
OTHER DEVICE
WITH I
R P
INTERFACE
Figure
2
C-BUS
R P
7. The P89LPC930/931 device
P89LPC930/931
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
OTHER DEVICE
WITH I
INTERFACE
2
C-BUS
002aaa433
SDA
SCL
30 of 55

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