p87lpc778-01 NXP Semiconductors, p87lpc778-01 Datasheet - Page 42

• Manufacturer Part Number: p87lpc778-01
• Description: P87lpc778 Cmos Single-chip 8-bit 80c51 Microcontroller With 128-byte Data Ram, 8 Kb Otp
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 12378
Product data
8.11.1 Brownout detection
8.11 Power monitoring functions
In addition to this, the CPU clock may be divided down from the oscillator rate by a
programmable divider, under program control. This function is controlled by the DIVM
register. If the DIVM register is set to zero (the default value), the CPU will be clocked
by either the unmodified oscillator rate, or that rate divided by two, as determined by
the previously described CLKR function.
When the DIVM register is set to some value N (between 1 and 255), the CPU clock
is divided by 2
This feature makes it possible to temporarily run the CPU at a lower rate, reducing
power consumption, in a manner similar to Idle mode. By dividing the clock, the CPU
can retain the ability to respond to events other than those that can cause interrupts
(i.e., events that allow exiting the Idle mode) by executing its normal program at a
lower rate. This can allow bypassing the oscillator startup time in cases where
Power-down mode would otherwise be used. The value of DIVM may be changed by
the program at any time without interrupting code execution.
The P87LPC778 incorporates power monitoring functions designed to prevent
incorrect operation during initial power up and power loss or reduction during
operation. This is accomplished with two hardware functions: Power-on Detect and
Brownout Detect.
The Brownout Detect function helps prevent the processor from failing in an
unpredictable manner if the power supply voltage drops below a certain level. The
default operation is for a brownout detection to cause a processor reset, however it
may alternatively be configured to generate an interrupt by setting the BOI bit in the
AUXR1 register (AUXR1.5).
The P87LPC778 allows selection of two Brownout levels: 2.5 V or 3.8 V. When V
drops below the selected voltage, the brownout detector triggers and remains active
until V
Detect causes a processor reset, that reset remains active as long as V
below the Brownout Detect voltage. When Brownout Detect generates an interrupt,
that interrupt occurs once as V
voltage. For the interrupt to be processed, the interrupt system and the BOI interrupt
must both be enabled (via the EA and EBO bits in IEN0).
When Brownout Detect is activated, the BOF flag in the PCON register is set so that
the cause of processor reset may be determined by software. This flag will remain set
until cleared by software.
For correct activation of Brownout Detect, the V
50 mV/ s. When V
insure a proper reset.
The brownout voltage (2.5 V or 3.8 V) is selected via the BOV bit in the EPROM
configuration register UCFG1. When unprogrammed (BOV = 1), the brownout detect
voltage is 2.5 V. When programmed (BOV = 0), the brownout detect voltage is 3.8 V.
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is returns to a level above the Brownout Detect voltage. When Brownout
(N + 1). Clock division values from 4 through 512 are thus possible.
Rev. 01 — 31 March 2004
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is restored, is should not rise faster than 2 mV/ s in order to
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crosses from above to below the Brownout Detect
CMOS single-chip 8-bit microcontroller
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fall time must be no faster than
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P87LPC778
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remains
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