lpc2106fhn48/00 NXP Semiconductors, lpc2106fhn48/00 Datasheet - Page 9

• Manufacturer Part Number: lpc2106fhn48/00
• Description: Single-chip 32-bit Microcontrollers; 128 Kb Isp/iap Flash With 64 Kb/32 Kb/16 Kb Ram
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 3.
LPC2104_2105_2106_6
Product data sheet
Symbol
P0.26/TRACESYNC
P0.27/TRACEPKT0/
TRST
P0.28/TRACEPKT1/
TMS
P0.29/TRACEPKT2/
TCK
P0.30/TRACEPKT3/
TDI
P0.31/EXTIN0/TDO
RTCK
DBGSEL
RESET
XTAL1
XTAL2
V
V
V
n.c.
SS
DD(1V8)
DD(3V3)
Pin description
Pin
39
8
9
10
15
16
26
27
6
11
12
7, 19,
31, 43
5
17, 40
4, 20,
25, 42
…continued
Type
I/O
O
I/O
O
I
I/O
O
I
I/O
O
I
I/O
O
I
I/O
I
O
I/O
I
I
I
O
I
I
I
-
Description
P0.26 — Port 0 bit 26
TRACESYNC — Trace Synchronization Standard I/O port with internal pull-up
P0.27 — Port 0 bit 27
TRACEPKT0 — Trace Packet, bit 0. Standard I/O port with internal pull-up
TRST — Test Reset for JTAG interface, secondary JTAG pin group
P0.28 — Port 0 bit 28
TRACEPKT1 — Trace Packet, bit 1. Standard I/O port with internal pull-up
TMS — Test Mode Select for JTAG interface, secondary JTAG pin group
P0.29 — Port 0 bit 29
TRACEPKT2 — Trace Packet, bit 2. Standard I/O port with internal pull-up
TCK — Test Clock for JTAG interface, secondary JTAG pin group
P0.30 — Port 0 bit 30
TRACEPKT3 — Trace Packet, bit 3. Standard I/O port with internal pull-up
TDI — Test Data In for JTAG interface, secondary JTAG pin group
P0.31 — Port 0 bit 31
EXTIN0 — External Trigger Input. Standard I/O port with internal pull-up
TDO — Test Data out for JTAG interface, secondary JTAG pin group
Returned Test Clock output: Extra signal added to the JTAG port. Assists
debugger synchronization when processor frequency varies. Also used during
debug mode entry to select primary or secondary JTAG pins with the 48-pin
package. Bidirectional pin with internal pull-up.
Debug Select: When LOW, the part operates normally. When HIGH, debug
mode is entered. Input pin with internal pull-down.
external reset input; a LOW on this pin resets the device, causing I/O ports and
peripherals to take on their default states, and processor execution to begin at
address 0. TTL with hysteresis, 5 V tolerant.
input to the oscillator circuit and internal clock generator circuits
output from the oscillator amplifier
ground: 0 V reference
1.8 V core power supply; this is the power supply voltage for internal circuitry
3.3 V pad power supply; this is the power supply voltage for the I/O ports
not connected; these pins are not connected in the 48 pin package
Rev. 06 — 25 July 2006
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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