p89c538nbb NXP Semiconductors, p89c538nbb Datasheet - Page 16

• Manufacturer Part Number: p89c538nbb
• Description: Cmos Single-chip 8-bit Microcontrollers With Flash Program Memory
• Manufacturer: NXP Semiconductors

Philips Semiconductors
DC ELECTRICAL CHARACTERISTICS
T
NOTES:
1. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the V
2. Capacitive loading on ports 0 and 2 may cause the V
3. Pins of ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
4. See Figures 17 through 20 for I
5. Load capacitance for port 0, ALE, and PSEN = 100pF, load capacitance for all other outputs = 80pF.
6. Under steady state (non-transient) conditions, I
7. ALE is tested to V
8. Pin capacitance is characterized but not tested. Pin capacitance is less than 25pF. Pin capacitance of ceramic package is less than 15pF
1998 Apr 24
amb
SYMBOL
SYMBOL
V
V
V
V
V
V
V
I
I
I
I
R
IL
TL
LI
CC
IL
IH
IH1
OL
OL1
OH
OH1
80C51 8-bit microcontroller family
16K/64K/512 FLASH
RST
to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the
worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify
ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input. I
single output sinks more than 5mA and no more than two outputs exceed the test conditions.
address bits are stabilizing.
maximum value when V
If I
test conditions.
(except EA is 25pF).
= 0 C to +70 C; 5V 10%; V
OL
Maximum I
Maximum I
Maximum total I
exceeds the test condition, V
Input low voltage
Input high voltage (ports 0, 1, 2, 3, EA)
Input high voltage, XTAL1, RST
Output low voltage, ports 1, 2, 3
Output low voltage, port 0, ALE, PSEN
Output high voltage, ports 1, 2, 3
Output high voltage (port 0 in external bus mode), ALE
PSEN
Logical 0 input current, ports 1, 2, 3
Logical 1-to-0 transition current, ports 1, 2, 3
Input leakage current, port 0
Power supply current (see Figure 16):
Internal reset pull-down resistor
Active mode
Idle mode
Power-down mode or clock stopped
OL
OL
(see Figure 20 for conditions)
2
per port pin:
per 8-bit port:
OH1
OL
, except when ALE is off then V
for all outputs:
IN
is approximately 2V.
SS
CC
PARAMETER
PARAMETER
= 0V
test conditions and Figure 15 for limits..
OL
may exceed the related specification. Pins are not guaranteed to sink current greater than the listed
15mA
26mA
71mA
6
2
OL
5, 6
must be externally limited as follows:
OH
OH
on ALE and PSEN to momentarily fall below the V
is the voltage specification.
7
,
16
0.45 < V
T
4.5V < V
amb
FREQ = 24 MHz
CONDITIONS
I
I
I
I
OH
OL
OL
V
V
V
OH
V
V
See note 3
See note 4
V
V
CC
CC
CC
CC
CC
= 0 C to 70 C
IN
IN
= 1.6mA
= 3.2mA
TEST
= –800 A
IN
= –30 A
= 0.4V
= 2.0V
= 4.5V
= 4.5V
= 4.5V
= 4.5V
= 5.5V
CC
< V
< 5.5V
CC
1
1
– 0.3
OL
OL
s of ALE and ports 1 and 3. The noise is due
can exceed these conditions provided that no
0.2V
V
V
0.7V
CC
CC
MIN
–0.5
CC
–1
40
– 0.7
– 0.7
CC
CC
+0.9
89C536/89C538
–0.7 specification when the
LIMITS
0.2V
Preliminary specification
V
V
CC
CC
MAX
–650
–50
100
225
0.4
0.4
CC
60
25
10
+0.5
+0.5
–0.1
UNIT
UNIT
mA
mA
k
V
V
V
V
V
V
V
A
A
A
A