p89cv51rb2 NXP Semiconductors, p89cv51rb2 Datasheet - Page 5

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p89cv51rb2

Manufacturer Part Number
p89cv51rb2
Description
P89cv51rb2/rc2/rd2 8-bit 80c51 5 V Low Power 64 Kb Flash Microcontroller With 1 Kb Ram, Spi, 6-clock Cpu With 6/12-clock Peripherals
Manufacturer
NXP Semiconductors
Datasheet

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Table 3.
P89CV51RB2_RC2_RD2_1
Product data sheet
Symbol
P0[0] to P0[7]
P0[0]/AD0
P0[1]/AD1
P0[2]/AD2
P0[3]/AD3
P0[4]/AD4
P0[5]/AD5
P89CV51RB2/RC2/RD2 Pin description
Pin
PLCC44
43
42
41
40
39
38
5.2 Pin description
Fig 3. TQFP44 pin configuration
TQFP44
37
36
35
34
33
32
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P1[7]/CEX4/SPICLK
P1[5]/CEX2/MOSI
P1[6]/CEX3/MISO
P3[2]/INT0
P3[3]/INT1
P3[0]/RXD
P3[1]/TXD
Description
Port 0: Port 0 is an 8-bit open-drain bidirectional I/O port. Port 0 pins that
have 1s written to them float, and in this state can be used as
high-impedance inputs. Port 0 is also the multiplexed low-order address
and data bus during accesses to external code and data memory. In this
application, it uses strong internal pull-ups when transitioning to 1s.
External pull-ups are required when used as a general purpose I/O port.
P0[0] — Port 0 bit 0.
AD0 — Address/data bit 0.
P0[1] — Port 0 bit 1.
AD1 — Address/data bit 1.
P0[2] — Port 0 bit 2.
AD2 — Address/data bit 2.
P0[3] — Port 0 bit 3.
AD3 — Address/data bit 3.
P0[4] — Port 0 bit 4.
AD4 — Address/data bit 4.
P0[5] — Port 0 bit 5.
AD5 — Address/data bit 5.
P3[4]/T0
P3[5]/T1
Rev. 01 — 5 October 2007
RST
n.c.
10
11
1
2
3
4
5
6
7
8
9
P89CV51RB2/RC2/RD2
P89CV51RB2/RC2/RD2
80C51 with 1 kB RAM, SPI
002aac961
33
32
31
30
29
28
27
26
25
24
23
P0[4]/AD4
P0[5]/AD5
P0[6]/AD6
P0[7]/AD7
EA
n.c.
ALE
PSEN
P2[7]/A15
P2[6]/A14
P2[5]/A13
© NXP B.V. 2007. All rights reserved.
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