lh7a400 NXP Semiconductors, lh7a400 Datasheet - Page 44
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lh7a400
Manufacturer Part Number
lh7a400
Description
Lh7a400 32-bit System-on-chip
Manufacturer
NXP Semiconductors
Datasheet
1.LH7A400.pdf
(65 pages)
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LH7A400
the serial frame pin (SSPFRM) is active LOW. Both the
SSP and external slave device drive their output data
on the falling edge of the clock, and latch data from the
other device on the rising edge of the clock. Unlike the
full-duplex transmission of the other two frame formats,
the National Semiconductor MICROWIRE format uti-
lizes a master-slave messaging technique that oper-
ates in half-duplex. When a frame begins in this mode,
44
For National Semiconductor MICROWIRE format,
nSSPFRM
nSSPFRM
SSPRXD
SSPRXD
SSPTXD
SSPTXD
SSPCLK
SSPCLK
LSB
MSB
Figure 27. MICROWIRE Frame Format (Continuous Transfers)
0
Figure 26. MICROWIRE Frame Format (Single Transfer)
MSB
8-BIT CONTROL
OUTPUT DATA
4 to 16 BITS
LSB
Rev. 01 — 16 July 2007
NXP Semiconductors
MSB
LSB
0
8-BIT CONTROL
MSB
an 8-bit control message is transmitted to the off-chip
slave. During this transmission no incoming data is
received by the SSP. After the message has been sent,
the external slave device decodes the message. After
waiting one serial clock period after the last bit of the 8-
bit control message was received it responds by return-
ing the requested data. The returned data can be 4 to
16 bits in length, making the total frame length between
13 to 25 bits. See Figure 26 and Figure 27.
OUTPUT DATA
4 to 16 BITS
LSB
LSB
MSB
32-Bit System-on-Chip
Preliminary data sheet
LH7A400-108
LH7A400-107