c8051f563 Silicon Laboratories, c8051f563 Datasheet - Page 154
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c8051f563
Manufacturer Part Number
c8051f563
Description
Mixed Signal Isp Flash Mcu Family
Manufacturer
Silicon Laboratories
Datasheet
1.C8051F563.pdf
(302 pages)
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*Note: T
Parameter
T
T
T
T
T
T
T
T
T
ALEH
ALEL
ACW
WDS
WDH
ACS
ACH
RDS
RDH
SYSCLK
is equal to one period of the device system clock (SYSCLK).
Address/Control Setup Time
Address/Control Pulse Width
Address/Control Hold Time
Address Latch Enable High Time
Address Latch Enable Low Time
Write Data Setup Time
Write Data Hold Time
Read Data Setup Time
Read Data Hold Time
Table 17.2. AC Parameters for External Memory Interface
Description
Rev. 1.0
1 x T
1 x T
1 x T
1 x T
Min*
20
SYSCLK
SYSCLK
SYSCLK
SYSCLK
0
0
0
0
16 x T
19 x T
3 x T
3 x T
4 x T
4 x T
3 x T
Max*
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
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