c8051t602 Silicon Laboratories, c8051t602 Datasheet - Page 31
c8051t602
Manufacturer Part Number
c8051t602
Description
Mixed Signal Otp Eprom Mcu Family
Manufacturer
Silicon Laboratories
Datasheet
1.C8051T602.pdf
(168 pages)
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5.
The ADC0 subsystem for the C8051T600/2/4 devices consists an analog multiplexer (referred to as
AMUX0) with 10 input selection options, a gain stage programmable to 1x or 0.5x, and a 500 ksps, 10-bit
successive-approximation-register (SAR) ADC with integrated track-and-hold and programmable window
detector (see block diagram in Figure 5.1). The multiplexer, data conversion modes and window detector
are all configurable under software control via the Special Function Registers shown in Figure 5.1. ADC0
may be configured to measure any Port pin, the Temperature Sensor output, or VDD with respect to GND.
The ADC0 subsystem is enabled only when the AD0EN bit in the ADC0 Control register (ADC0CN) is set
to logic 1. The ADC0 subsystem remains in a low power shutdown state when this bit is logic 0. A special
8-bit mode is also provided for backwards-compatibility with the C8051F300 development platform.
Sensor
Temp
ADC0 - 10-Bit SAR ADC (C8051T600/2/4 Only)
VDD
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
AMX0SL
Figure 5.1. ADC0 Functional Block Diagram
10-to-1
AMUX
X1 or
X0.5
Rev. 0.5
ADC0CF
ADC
C8051T600/1/2/3/4/5
10-Bit
VDD
SAR
ADC0GTH:L
ADC0LTH:L
ADC0CN
Conversion
Start
10
20
000
001
010
011
1xx
AD0WINT
Comb.
AD0BUSY (W)
Timer 0 Overflow
Timer 2 Overflow
Timer 1 Overflow
CNVSTR Input
Logic
31
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