c8051t602 Silicon Laboratories, c8051t602 Datasheet - Page 67
c8051t602
Manufacturer Part Number
c8051t602
Description
Mixed Signal Otp Eprom Mcu Family
Manufacturer
Silicon Laboratories
Datasheet
1.C8051T602.pdf
(168 pages)
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9.2.7. Register Descriptions
Following are descriptions of SFRs related to the operation of the CIP-51 System Controller. Reserved bits
should only be set to the value indicated in the register description. Future product versions may use these
bits to implement new features in which case the reset value of the bit will select the feature's default state.
Detailed descriptions of the remaining SFRs are included in the sections of the data sheet associated with
their corresponding system function.
Bits7–0: DPL: Data Pointer Low.
Bits7–0: DPH: Data Pointer High.
Bits7–0: SP: Stack Pointer.
R/W
R/W
R/W
Bit7
Bit7
Bit7
The DPL register is the low byte of the 16-bit DPTR.
The DPH register is the high byte of the 16-bit DPTR.
The Stack Pointer holds the location of the top of the stack. The stack pointer is incremented
before every PUSH operation. The SP register defaults to 0x07 after reset.
R/W
R/W
R/W
Bit6
Bit6
Bit6
SFR Definition 9.2. DPH: Data Pointer High Byte
SFR Definition 9.1. DPL: Data Pointer Low Byte
R/W
R/W
R/W
Bit5
Bit5
Bit5
SFR Definition 9.3. SP: Stack Pointer
R/W
R/W
R/W
Bit4
Bit4
Bit4
Rev. 0.5
R/W
R/W
R/W
Bit3
Bit3
Bit3
R/W
R/W
R/W
Bit2
Bit2
Bit2
C8051T600/1/2/3/4/5
R/W
R/W
R/W
Bit1
Bit1
Bit1
R/W
R/W
R/W
Bit0
Bit0
Bit0
SFR Address:
SFR Address:
SFR Address:
00000000
00000000
Reset Value
Reset Value
Reset Value
00000111
0x82
0x83
0x81
67
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