mc9s08dv16 Freescale Semiconductor, Inc, mc9s08dv16 Datasheet - Page 15

• Manufacturer Part Number: mc9s08dv16
• Description: Hcs08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Section Number
12.4 Programmer’s Model of Message Storage .....................................................................................239
12.5 Functional Description ...................................................................................................................248
12.6 Initialization/Application Information ...........................................................................................268
13.1 Introduction ....................................................................................................................................271
13.2 External Signal Description ...........................................................................................................276
13.3 Modes of Operation........................................................................................................................277
13.4 Register Definition .........................................................................................................................277
13.5 Functional Description ...................................................................................................................282
Freescale Semiconductor
12.3.15MSCAN Identifier Acceptance Registers (CANIDAR0-7) ............................................237
12.3.16MSCAN Identifier Mask Registers (CANIDMR0–CANIDMR7) .................................238
12.4.1 Identifier Registers (IDR0–IDR3) ...................................................................................242
12.4.2 IDR0–IDR3 for Standard Identifier Mapping .................................................................244
12.4.3 Data Segment Registers (DSR0-7) .................................................................................245
12.4.4 Data Length Register (DLR) ...........................................................................................246
12.4.5 Transmit Buffer Priority Register (TBPR) ......................................................................247
12.4.6 Time Stamp Register (TSRH–TSRL) .............................................................................247
12.5.1 General ............................................................................................................................248
12.5.2 Message Storage .............................................................................................................249
12.5.3 Identifier Acceptance Filter .............................................................................................252
12.5.4 Modes of Operation ........................................................................................................259
12.5.5 Low-Power Options ........................................................................................................260
12.5.6 Reset Initialization ..........................................................................................................266
12.5.7 Interrupts .........................................................................................................................266
12.6.1 MSCAN initialization .....................................................................................................268
12.6.2 Bus-Off Recovery ...........................................................................................................269
13.1.1 Features ...........................................................................................................................273
13.1.2 Block Diagrams ..............................................................................................................273
13.1.3 SPI Baud Rate Generation ..............................................................................................275
13.2.1 SPSCK — SPI Serial Clock ............................................................................................276
13.2.2 MOSI — Master Data Out, Slave Data In ......................................................................276
13.2.3 MISO — Master Data In, Slave Data Out ......................................................................276
13.2.4 SS — Slave Select ...........................................................................................................276
13.3.1 SPI in Stop Modes ..........................................................................................................277
13.4.1 SPI Control Register 1 (SPIC1) ......................................................................................277
13.4.2 SPI Control Register 2 (SPIC2) ......................................................................................278
13.4.3 SPI Baud Rate Register (SPIBR) ....................................................................................279
13.4.4 SPI Status Register (SPIS) ..............................................................................................280
13.4.5 SPI Data Register (SPID) ................................................................................................281
13.5.1 SPI Clock Formats ..........................................................................................................282
Serial Peripheral Interface (S08SPIV3)
MC9S08DV60 Series Data Sheet, Rev 3
Chapter 13
Subject to Change
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