cop8cde9 National Semiconductor Corporation, cop8cde9 Datasheet - Page 12
cop8cde9
Manufacturer Part Number
cop8cde9
Description
8-bit Cmos Flash Microcontroller With 8k Memory, Virtual Eeprom, 10-bit A/d And Brownout Reset
Manufacturer
National Semiconductor Corporation
Datasheet
1.COP8CDE9.pdf
(75 pages)
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www.national.com
Resolution
DNL
INL
Offset Error
Gain Error
Input Voltage Range
Analog Input Leakage Current
Analog Input Resistance (Note 9)
Analog Input Capacitance
Conversion Clock Period
Conversion Time (including S/H Time)
Operating Current on AV
Note 17: Resistance between the device input and the internal sample and hold capacitance.
3.0 Pin Descriptions
The COP8CBE/CCE/CDE I/O structure enables designers to
reconfigure the microcontroller’s I/O functions with a single
instruction. Each individual I/O pin can be independently
configured as output pin low, output high, input with high
impedance or input with weak pull-up device. A typical ex-
ample is the use of I/O pins as the keyboard matrix input
lines. The input lines can be programmed with internal weak
pull-ups so that the input lines read logic high when the keys
are all open. With a key closure, the corresponding input line
will read a logic zero since the weak pull-up can easily be
overdriven. When the key is released, the internal weak
pull-up will pull the input line back to logic high. This elimi-
nates the need for external pull-up resistors. The high cur-
rent options are available for driving LEDs, motors and
speakers. This flexibility helps to ensure a cleaner design,
with less external components and lower costs. Below is the
general description of all available pins.
V
pins must be connected.
Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
CC
and GND are the power supply pins. All V
Parameter
A/D Converter Electrical Characteristics (−40˚C
CC
FIGURE 1. MICROWIRE/PLUS Timing
V
V
V
V
4.5V
4.5V
AV
CC
CC
CC
CC
CC
CC
and GND
= 5V
= 5V
= 5V
= 5V
Conditions
= 5.5V
V
V
CC
CC
<
<
5.5V
5.5V
12
Users of the LLP package are cautioned to be aware that the
central metal area and the pin 1 index mark on the bottom of
the package may be connected to GND. See figure below:
T
A
Min
0.8
+125˚C) (Single-ended mode only)
0
Typ
0.2
15
FIGURE 2.
20022505
±
±
Max
0.66
V
0.5
±
±
10
6k
30
1.5
1.5
CC
7
1
2
20022570
Conversion
Cycles
Units
Clock
LSB
LSB
LSB
LSB
Bits
A/D
mA
µA
pF
µs
V
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