cop8cde9 National Semiconductor Corporation, cop8cde9 Datasheet - Page 64
cop8cde9
Manufacturer Part Number
cop8cde9
Description
8-bit Cmos Flash Microcontroller With 8k Memory, Virtual Eeprom, 10-bit A/d And Brownout Reset
Manufacturer
National Semiconductor Corporation
Datasheet
1.COP8CDE9.pdf
(75 pages)
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14.0 Instruction Set
14.4.6 Stack Control Instructions
14.4.7 Memory Bit Manipulation Instructions
The memory bit manipulation instructions allow the user to
set and reset individual bits in memory.
14.4.8 Conditional Instructions
The conditional instruction test a condition. If the condition is
true, the next instruction is executed in the normal manner; if
the condition is false, the next instruction is skipped.
14.4.9 No-Operation Instruction
The no-operation instruction does nothing, except to occupy
space in the program memory and time in execution.
Note: The VIS is a special case of the Indirect Transfer of
Control addressing mode, where the double byte vector
associated with the interrupt is transferred from adjacent
addresses in the program memory into the program counter
(PC) in order to jump to the associated interrupt service
routine.
Swap Nibbles of Accumulator (SWAP)
Push Data onto Stack (PUSH)
Pop Data off of Stack (POP)
Set Bit (SBIT)
Reset Bit (RBIT)
Reset Pending Bit (RPND)
If Equal (IFEQ)
If Not Equal (IFNE)
If Greater Than (IFGT)
If Carry (IFC)
If Not Carry (IFNC)
If Bit (IFBIT)
If B Pointer Not Equal (IFBNE)
And Skip if Zero (ANDSZ)
Decrement Register and Skip if Zero (DRSZ)
No-Operation (NOP)
(Continued)
64
14.5 REGISTER AND SYMBOL DEFINITION
The following abbreviations represent the nomenclature
used in the instruction description and the COP8
cross-assembler.
A
B
X
S
SP
PC
PU
PL
C
HC
GIE
VU
VL
[B]
[X]
MD
Mem
Meml
Imm
Reg
Bit
8-Bit Accumulator Register
8-Bit Address Register
8-Bit Address Register
8-Bit Segment Register
8-Bit Stack Pointer Register
15-Bit Program Counter Register
Upper 7 Bits of PC
Lower 8 Bits of PC
1 Bit of PSW Register for Carry
1 Bit of PSW Register for Half Carry
1 Bit of PSW Register for Global Interrupt
Enable
Interrupt Vector Upper Byte
Interrupt Vector Lower Byte
Memory Indirectly Addressed by B Register
Memory Indirectly Addressed by X Register
Direct Addressed Memory
Direct Addressed Memory or [B]
Direct Addressed Memory or [B] or
Immediate Data
8-Bit Immediate Data
Register Memory: Addresses F0 to FF
(Includes B, X and SP)
Bit Number (0 to 7)
Loaded with
Exchanged with
Registers
Symbols
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