z86c9216vsc ZiLOG Semiconductor, z86c9216vsc Datasheet
z86c9216vsc
Related parts for z86c9216vsc
z86c9216vsc Summary of contents
Page 1
FEATURES ROM RAM* Part (KB) (Bytes) Z86C72 16 748 Z86C92 0 748 Z86L72 16 748 Z86L92 0 748 Note: *General-Purpose Expanded Register File Control Registers Low Power Consumption - 40 mW (typical) Three Standby Modes: – STOP – HALT – ...
Page 2
Z86C72/C92/L72/L92 IR Microcontroller GENERAL DESCRIPTION (Continued) access to register mapped peripherals, I/O circuits, and powerful counter/timer circuitry. The Z86C72/C92/L72/L92 offers a flexible I/O scheme, an efficient register and ad- dress space structure, and a number of ancillary features that are ...
Page 3
Zilog P00 P01 P02 P03 Port 0 P04 P05 P06 P07 P10 P11 P12 P13 Port 1 P14 P15 P16 P17 P20 P21 P22 P23 Port 2 P24 P25 P26 P27 Note: All Signals with a preceding front slash, "/", ...
Page 4
Z86C72/C92/L72/L92 IR Microcontroller PIN DESCRIPTION R//RL R//W 6-4 1 R//W 40 P25 P26 P27 P04 P05 P06 P14 Z86C72/C92 P15 Z86L72/L92 P07 VDD DIP P16 P17 XTAL2 XTAL1 P31 P32 P33 P34 / Figure 3. 40-Pin DIP Pin ...
Page 5
Zilog R//RL R//W DS97LVO0900 33 P21 34 P22 P23 P24 Z86C72/C92 /DS Z86L72/L92 QFP P25 P26 P27 P04 44 1 Figure 5. 44-Pin QFP Pin Assignments Z86C72/C92/L72/L92 IR Microcontroller ...
Page 6
Z86C72/C92/L72/L92 IR Microcontroller PIN DESCRIPTION (Continued) 40-Pin 44-Pin 44-Pin DIP # PLCC QFP ...
Page 7
Zilog ABSOLUTE MAXIMUM RATINGS Symbol Description Min V Supply Voltage (*) -0 Storage Temp. -65 STG T Oper. Ambient A Temp. Notes: * Voltage on all pins with respect to GND † See Ordering Information STANDARD TEST CONDITIONS ...
Page 8
Z86C72/C92/L72/L92 IR Microcontroller DC CHARACTERISTICS (Z86L72/L92 LOW VOLTAGE SPECIFICATIONS) Preliminary Sym Parameter Max Input Voltage 2.0V 3.9V V Clock Input 2.0V CH High Voltage 3.9V V Clock Input 2.0V CL Low Voltage 3.9V V Input High Voltage 2.0V IH 3.9V ...
Page 9
Zilog Sym Parameter V Output Low 2.0V OL1 Voltage 3.9V V Output Low 2.0V OL2* Voltage 3.9V V Output Low 2.0V OL2 Voltage(P36, 3.9V P37,P00,P01) V Reset Input 2.0V RH High Voltage 3.9V V Reset Input 2.0V Rl Low Voltage ...
Page 10
Z86C72/C92/L72/L92 IR Microcontroller Sym Parameter I Standby Current 2.0V CC1 (WDT Off) 3.9V 2.0V 3.9V I Standby Current 2.0V CC2 3.9V 2.0V 3.9V T Power-On Reset 2.0V POR 3.9V V Static RAM Data Vram RAM Retention Voltage V V Low ...
Page 11
Zilog DC CHARACTERISTICS (Z86C72/C92 SPECIFICATIONS) Preliminary V Sym Parameter CC Max Input 4.5V Voltage 5.5V V Clock Input 4.5V CH High Voltage 5.5V V Clock Input 4.5V CL Low Voltage 5.5V V Input High 4.5V IH Voltage 5.5V V Input ...
Page 12
Z86C72/C92/L72/L92 IR Microcontroller DC CHARACTERISTICS (Z86C72/C92 SPECIFICATIONS) (Continued) Sym Parameter I Standby Current 4.5V CC1 (WDT Off) 5.5V 4.5V 5.5V I Standby Current 4.5V CC2 5.5V 4.5V 5.5V T Power-On Reset 4.5V POR 5.5V V Static RAM Data Vram RAM ...
Page 13
Zilog AC CHARACTERISTICS External I/O or Memory Read and Write Timing Diagram R//W 12 Port 0, /DM 18 Port 1 1 /AS 4 /DS (Read) Port 1 /DS (Write) Figure 7. External I/O or Memory Read/Write Timing DS97LVO0900 16 3 ...
Page 14
Z86C72/C92/L72/L92 IR Microcontroller AC CHARACTERISTICS (Z86L72/L92 LOW VOLTAGE SPECIFICATIONS) Preliminary External I/O or Memory Read and Write Timing Table No Symbol Parameter 1 TdA(AS) Address Valid to /AS Rising Delay 2 TdAS(A) /AS Rising to Address Float Delay 3 TdAS(DR) ...
Page 15
Zilog AC CHARACTERISTICS (Z86C72/C92 SPECIFICATIONS) Preliminary External I/O or Memory Read and Write Timing Table No Symbol Parameter 1 TdA(AS) Address Valid to /AS Rising Delay 2 TdAS(A) /AS Rising to Address Float Delay 3 TdAS(DR) /AS Rising to Read ...
Page 16
Z86C72/C92/L72/L92 IR Microcontroller AC CHARACTERISTICS Additional Timing Diagram Clock IRQ N Clock Setup Stop Mode Recovery Source 6- Figure 8. Additional Timing ...
Page 17
Zilog AC CHARACTERISTICS (Z86L72/L92 LOW VOLTAGE SPECIFICATIONS) Preliminary Additional Timing Table No Sym Parameter 1 TpC Input Clock Period 2 TrC,TfC Clock Input Rise and Fall Times 3 TwC Input Clock Width 4 TwTinL Timer Input Low Width 5 TwTinH ...
Page 18
Z86C72/C92/L72/L92 IR Microcontroller AC CHARACTERISTICS(Z86C72/C92 SPECIFICATIONS) Preliminary Additional Timing Table No Symbol Parameter 1 TpC Input Clock Period 2 TrC, TfC Clock Input Rise and Fall Times 3 TwC Input Clock Width 4 TwTinL Timer Input Low Width 5 TwTinH ...
Page 19
Zilog AC CHARACTERISTICS Handshake Timing Diagrams Data In Data In Valid 1 /DAV (Input) RDY (Output) Figure 9. Port I/O with Input Handshake Timing Data Out 7 /DAV (Output) RDY (Input) Figure 10. Port I/O with Output Handshake Timing DS97LVO0900 ...
Page 20
Z86C72/C92/L72/L92 IR Microcontroller AC CHARACTERISTICS (Z86L72/L92 LOW VOLTAGE SPECIFICATIONS) Preliminary Handshake Timing Table No Sym 1 TsDI(DAV) Data In Setup Time 2 ThDI(DAV) Data In Hold Time 3 TwDAV Data Available Width 4 TdDAVI(RDY) DAV Falling to RDY Falling Delay ...
Page 21
Zilog AC CHARACTERISTICS(Z86C72/C92 SPECIFICATIONS) Preliminary Handshake Timing Table No Symbol Parameter 1 TSD(DAV) Data in Setup Time 2 ThD(DAV) Data in Hold Time 3 TwDAV Data Available Width 4 TdDAVI(RDY) DAV Falling to RDY Falling Delay 5 TdDAVId(RDY) DAV Rising ...
Page 22
Z86C72/C92/L72/L92 IR Microcontroller PIN FUNCTIONS /DS (Output, active Low). Data Strobe is activated once for each external memory transfer. For a READ operation, data must be available prior to the trailing edge of /DS. For WRITE operations, the falling edge ...
Page 23
Zilog Z86LXX MCU OEN Out In In 0.4 VDD Trip Point Buffer DS97LVO0900 4 Port 0 (I/O or A15 - A8) 4 Optional Handshake Controls /DAV0 and RDY0 (P32 and P35) Refer to the Z86C17 specification for application information in ...
Page 24
Z86C72/C92/L72/L92 IR Microcontroller PIN FUNCTIONS (Continued) Port 1 (P17-P10). Port multiplexed Address (A7-A0) and Data (D7-D0), CMOS compatible port. Port 1 is dedi- ® cated to the Zilog ZBus -compatible memory interface. The operations of Port 1 ...
Page 25
Zilog Port 2 (P27-P20). Port 8-bit, bidirectional, CMOS compatible I/O port. These eight I/O lines can be indepen- dently configured under software control as inputs or out- puts. Port 2 is always available for I/O operation. A ...
Page 26
Z86C72/C92/L72/L92 IR Microcontroller PIN FUNCTIONS (Continued) Port 3 (P37-P31). Port 7-bit, CMOS compatible three fixed input and four fixed output port. Port 3 consists of three fixed input (P33-P31) and four fixed output (P37- P34), and can ...
Page 27
Zilog P34 OUT P31 + - Pref1 P37 OUT P32 + - P33 (Pref2) PCON Comparator Inputs. In Analog Mode, Port 3 (P31 and P32) have a comparator front end. The comparator refer- ence is supplied to P33 and Pref1. ...
Page 28
Z86C72/C92/L72/L92 IR Microcontroller PIN FUNCTIONS (Continued) /RESET (Input, active Low). Initializes the MCU. Reset is accomplished either through Power-On, Watch-Dog Tim- er, Stop-Mode Recovery, Low Voltage detection, or exter- nal reset. During Power-On Reset and Watch-Dog Timer Reset, the internally ...
Page 29
Zilog DS97LVO0900 CTR0, D0 Out 34 MUX T8_Out CTR2, D0 Out 35 MUX T16_Out CTR1, D6 Out 36 MUX T8/16_Out Figure 16. Port 3 Configuration Z86C72/C92/L72/L92 IR Microcontroller VDD ...
Page 30
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION ® The Z8 incorporates special functions to enhance func- tionality in consumer and battery operated applications. Reset. The device is reset in one of the following condi- tions: 1. Power-On Reset 2. Watch-Dog Timer 3. ...
Page 31
Zilog 65535 External Data Memory 16,384 Not Addressable 0 Figure 18. Data Memory Map External Memory (/DM). The Z86L72 addresses up to 48K bytes (minus Extended Data RAM space) of external memory beginning at address 16384 (Figure 18). External data ...
Page 32
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) REGISTER POINTER Expanded Register Working Register Group Pointer Bank/Group Pointer Z8 Register File (Bank0 EXP ANDED REG. GROUP (0) REGISTER** RESET ...
Page 33
Zilog R253 Expanded Register File Pointer Working Register Pointer Default Setting After Reset = 0000 0000 Figure 20. Register Pointer Register File. The register file (bank 0) consists of four I/O ...
Page 34
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) Counter/Timer Register Description Expanded Register Group D (D)H0C Reserved (D)H0B (D)H0A (D)H09 (D)H08 (D)H07 (D)H06 (D)H05 (D)H04 (D)H03 Reserved (D)H02 (D)H01 (D)H00 HI8(D)H0B: Holds the captured data from the output of the 8-bit Counter/Timer0. ...
Page 35
Zilog CTR0 (D)00H: Counter/Timer8 Control Register. Field T8_Enable Single/Modulo-N Time_Out T8_Clock Capture_INT_Mask Counter_INT_Mask P34_Out Note: *Indicates the value upon Power-On Reset. CTR0: Counter/Timer8 Control Register Description T8 Enable. This field enables T8 when set (written Single/Modulo-N. When set ...
Page 36
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) CTR1(D)H01: Controls the functions in common with the T8 and T16. Field Mode P36_Out/ Demodulator_Input T8/T16_Logic/ Edge _Detect Transmit_Submode/Glitch_Filter Initial_T8_Out/ Rising_Edge Initial_T16_Out/ Falling _Edge Note: *Indicates the value upon Power-On Reset 6-36 Bit Position ...
Page 37
Zilog CTR1 Register Description Mode the Counter/Timers are in the transmit mode, otherwise they are in the demodulation mode. P36_Out/Demodulator_Input. In Transmit Mode, this bit defines whether P36 is used as a normal output pin or ...
Page 38
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) CTR2 (D)H02: Counter/Timer16 Control Register. Field Bit Position T16_Enable 7------- Single/Modulo-N -6------ Time_Out --5----- T16 _Clock ---43--- Capture_INT_Mask -----2-- Counter_INT_Mask ------1- P35_Out -------0 Notes: * Indicates the value upon Power-On Reset CTR2 Description T16_Enable. ...
Page 39
Zilog Counter/Timer Functional Blocks P31 MUX P20 CTR1 D6 CTR1 D3,D2 Z8 Data Bus Pos Edge Neg Edge CTR0 D4, D3 Clock SCLK Select TC8H Z8 Data Bus DS97LVO0900 CTR1 D5,D4 Glitch Filter Figure 22. Glitch Filter Circuitry HI8 LO8 ...
Page 40
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) Input Circuit The edge detector monitors the input signal on P31 or P20. Based on CTR1 D5-D4, a pulse is generated at the Pos Edge or Neg Edge line when an edge is detected. ...
Page 41
Zilog T8 Demodulation Mode The user should program TC8L and TC8H to %FF. After T8 is enabled, when the first edge (rising, falling, or both depending on CTR1 D5, D4) is detected, it starts to count down. When a subsequent ...
Page 42
Z86C72/C92/L72/L92 IR Microcontroller Reset T8_Enable Bit Set Time-out Status Bit (CTR0 D5) and Generate Timeout_Int If Enabled 6-42 T8 (8-Bit) Transmit Mode No T8_Enable Bit Set CTR0, D7 Yes 0 CTRI, D1 Value Load TC8L Reset T8_OUT Enable T8 No ...
Page 43
Zilog Disable T8 DS97LVO0900 T8 (8-Bit) Demodulation Mode T8_Enable CTR0 Yes %FF TC8 Edge Present No Yes Enable TC8 T8_Enable Bit Set Yes No Edge Present Yes Set Edge Present Status Bit And Trigger Data Capture Int. If ...
Page 44
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) Z8 Data Bus Pos Edge Neg Edge CTR2 D4, D3 Clock Clock SCLK Select TC16H Z8 Data Bus T16 Transmit Mode In Normal or Ping-Pong Mode, the output of T16 when not enabled is ...
Page 45
Zilog “Counter Enable” Command, T16_OUT Switches To Its Initial Value (CTR1 D0) TC16H*256+TC16L T16_OUT “Counter Enable” Command, T16_OUT Switches To Its Initial Value (CTR1 D0) T16 Demodulation Mode The user should program TC16L and TC16H to %FF. After T16 is ...
Page 46
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) Ping-Pong Mode This operation mode is only valid in Transmit Mode. T8 and T16 need to be programmed in Single-Pass Mode (CTR0 D6, CTR2 D6) and Ping-Pong Mode needs to be programmed in CTR1 ...
Page 47
Zilog To Initiate Ping-Pong Mode First, make sure both counter/timers are not running. Then set T8 into Single-Pass Mode (CTR0 D6), set T16 into Sin- gle-Pass Mode (CTR2 D6), and set Ping-Pong Mode (CTR1 D2, D3). These instructions do not ...
Page 48
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) T8_OUT T16_OUT MUX CTR1, D2 CTR1 D3 6-48 P34_INTERNAL P36_INTERNAL AND/OR/NOR/NAND Logic CTR1 D5,D4 P35_INTERNAL Figure 34. Output Circuit Zilog P34_EXT MUX CTR0 ...
Page 49
Zilog Interrupts. The Z86L7X/CX2 has five different interrupts. The interrupts are maskable and prioritized (Figure 35). The five sources are divided as follows: three sources are claimed by Port 3 lines P33-P31, the remaining two by the Interrupt Request DS97LVO0900 ...
Page 50
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) Table 3. Interrupt Types, Sources, and Vectors Vector Name Source Location IRQ0 /DAV0, IRQ0 0, 1 IRQ1 IRQ1 2, 3 IRQ2 /DAV2, IRQ2 IRQ3 T16 6, 7 IRQ4 T8 8, ...
Page 51
Zilog Power-On Reset (POR). A timer circuit clocked by a ded- icated on-board RC oscillator is used for the Power-On Re- set (POR) timer function. The POR time allows V the oscillator circuit to stabilize before instruction execu- tion begins. ...
Page 52
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) Port Configuration Register (PCON). The PCON regis- ter configures the comparator output on Port locat- PCON (FH) 00H Default Setting After Reset ...
Page 53
Zilog Comparator Output Port 3 (D0). Bit 0 controls the com- parator used in Port this location brings the com- parator outputs to P34 and P37, and a 0 releases the Port to its standard I/O ...
Page 54
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) SMR D4 VCC SMR D4 P31 SMR D4 P32 SMR D4 P33 To IRQ1 S4 SMR D4 P27 SMR D4 P20 P23 SMR D4 P20 P27 To RESET and WDT Circuitry (Active Low) 6-54 ...
Page 55
Zilog SCLK/TCLK Divide-by-16 Select (D0 the SMR controls a Divide-by-16 prescaler of SCLK/TCLK. The pur- pose of this control is to selectively reduce device power consumption during normal processor execution (SCLK control) and/or HALT mode (where TCLK sources ...
Page 56
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) SMR2 (0F Note: If used in conjunction with SMR, either of the two specified events will cause a Stop-Mode Recovery. *Default Setting After Reset 6-56 ...
Page 57
Zilog Watch-Dog Timer Mode Register (WDTMR). The WDT is a retriggerable one-shot timer that resets the reaches its terminal count. The WDT must initially be en- abled by executing the WDT instruction and refreshed on subsequent executions ...
Page 58
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) WDT Time Select (D0, D1). Selects the WDT time period configured as shown in Table 6. Table 6. WDT Time Select Time-Out Internal RC OSC ...
Page 59
Zilog /RESET 5 Clock Filter CK Source Select (WDTMR) XTAL INTERNAL Low Operating Voltage Det. + VDD - VBO/VLV 2V REF . WDT From Stop Mode 12 ns Glitch Filter Recovery Source Stop Delay Select (SMR) * /CLR1 and /CLR2 ...
Page 60
Z86C72/C92/L72/L92 IR Microcontroller FUNCTIONAL DESCRIPTION (Continued) Mask Selectable Options. There are six Mask Selectable Options to choose from based on ROM code require- ments. (See Table 7). Table 7. Mask Selectable Options Option Permanent Watch-Dog On/WDT command invoked Timer RAM ...
Page 61
Zilog EXPANDED REGISTER FILE CONTROL REGISTERS (0D) CTR0 (0D Default Setting After Reset DS97LVO0900 0 P34 as Port Output* 1 Timer8 Output 0 Disable T8 Time Out Interrupt 1 Enable ...
Page 62
Z86C72/C92/L72/L92 IR Microcontroller CTR1 (0D *Default after Reset Note: Care must be taken in differentiating Transmit Mode from Demodulation Mode. Depending on which of these two modes is operating, the CTR1 bit will have different functions. ...
Page 63
Zilog CTR2 (0D) 02H Default Setting After Reset DS97LVO0900 0 P35 is Port Output* 1 P35 is TC16 Output 0 Disable T16 Time-Out Interrupt 1 Enable T16 Time-Out Interrupt 0 Disable ...
Page 64
Z86C72/C92/L72/L92 IR Microcontroller EXPANDED REGISTER FILE CONTROL REGISTERS (0D) (Continued) SMR (0F Default Setting After Reset ** Default Setting After Reset and Stop-Mode Recovery 6-64 SCLK/TCLK Divide-by-16 0 OFF 1 ...
Page 65
Zilog SMR2 (0F) 0DH Note: If used in conjunction with SMR, either of the two specified events will cause a Stop-Mode Recovery. *Default Setting After Reset DS97LVO0900 Reserved (Must be 0) Reserved ...
Page 66
Z86C72/C92/L72/L92 IR Microcontroller WDTMR (0F Default Setting After Reset PCON (FH) 00H Default Setting After Reset P37 comparator output only on ...
Page 67
Zilog ® Z8 STANDARD CONTROL REGISTER DIAGRAMS R247 P3M Effects P34 and P35 Figure 52. Port 3 Mode Register (F7H: Write Only) R248 P01M ...
Page 68
Z86C72/C92/L72/L92 IR Microcontroller R250 IRQ Default Setting After Reset = 0000 0000 Figure 56. Interrupt Request Register ((0) FAH: Read/Write) R251 IMR Default ...
Page 69
Zilog PACKAGE INFORMATION DS97LVO0900 Figure 62. 40-Pin DIP Package Diagram Figure 63. 44-Pin PLCC Package Diagram Z86C72/C92/L72/L92 IR Microcontroller 1 6-69 ...
Page 70
Z86C72/C92/L72/L92 IR Microcontroller 6-70 Figure 64. 44-Pin QFP Package Diagram Zilog DS97LVO0900 ...
Page 71
... Z86L9208VSC Z86L7208FSC Z86C72/C92 16 MHz 40-pin DIP 44-pin PLCC Z86C7216PSC Z86C7216VSC 44-pin QFP Z86C9216VSC Z86C7216FSC For fast results, contact your local Zilog sales office for assistance in ordering the part desired. Codes Package P = Plastic DIP F = Plastic Quad Flat Pack V = Plastic Chip Carrier Temperature ...