z86c9216vsc ZiLOG Semiconductor, z86c9216vsc Datasheet - Page 33

• Manufacturer Part Number: z86c9216vsc
• Description: Ir Microcontroller
• Manufacturer: ZiLOG Semiconductor

Zilog
Register File. The register file (bank 0) consists of four I/O
port registers, 236 general-purpose registers, and 16 con-
trol and status registers (R0-R3, R4-R239, and R240-
R255, respectively), Plus two expanded registers groups
(Banks D and F). Instructions can access registers directly
or indirectly through an 8-bit address field. This allows a
short, 4-bit register address using the Register Pointer
(Figure 23). In the 4-bit mode, the register file is divided
into 16 working register groups, each occupying 16 contin-
uous locations. The Register Pointer addresses the start-
ing location of the active working register group.
Note: Working register group E0-EF can only be access-
ed through working registers and indirect addressing
modes.
Stack. The Z86L/CX2 external data memory or the inter-
nal register file is used for the stack. An 8-bit Stack Pointer
(R255) is used for the internal stack that resides in the gen-
eral-purpose registers (R4-R239). SPH is used as a gen-
eral-purpose register only when using internal stacks.
DS97LVO0900
R253 RP
Default Setting After Reset = 0000 0000
D7 D6 D5 D4 D3 D2 D1 D0
Figure 20. Register Pointer
Expanded Register File Pointer
Working Register Pointer
P R E L I M I N A R Y
Note: When SPH is used as a general-purpose register
and Port 0 is in address mode, the contents of SPH will be
loaded into Port 0 whenever the internal stack is accessed.
FF
F0
2F
1F
0F
20
10
00
The upper nibble of the register file address
provided by the register pointer specifies
the active working-register group
Figure 21. Register Pointer
r
7
r
6
Specified Working
r
5
Register Group
Register Group 0
Register Group 1
r
4
I/O Ports
r
3
r
2
r
1
Z86C72/C92/L72/L92
r
IR Microcontroller
0
R253
The lower nibble
of the register
file address
provided by the
instruction points
to the specified
register
R15 to R0
R15 to R0
R15 to R4
R3 to R0
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