z86c9216vsc ZiLOG Semiconductor, z86c9216vsc Datasheet - Page 51

• Manufacturer Part Number: z86c9216vsc
• Description: Ir Microcontroller
• Manufacturer: ZiLOG Semiconductor

Zilog
Power-On Reset (POR). A timer circuit clocked by a ded-
icated on-board RC oscillator is used for the Power-On Re-
set (POR) timer function. The POR time allows V
the oscillator circuit to stabilize before instruction execu-
tion begins.
The POR timer circuit is a one-shot timer triggered by one
of three conditions:
HALT. HALT turns off the internal CPU clock, but not the
XTAL oscillation. The counter/timers and external inter-
rupts IRQ0, IRQ1, IRQ2, IRQ3, and IRQ4 remain active.
The devices are recovered by interrupts, either externally
or internally generated. An interrupt request must be exe-
cuted (enabled) to exit HALT mode. After the interrupt ser-
vice routine, the program continues from the instruction af-
ter the HALT.
DS97LVO0900
* Preliminary value including pin parasitics
C1
C2
Ceramic Resonator or Crystal
C1, C2 = 47 pF TYP *
f = 8 MHz
XTAL1
XTAL2
C1
C2
LC
C1, C2 = 22 pF
L = 130 H *
f = 3 MHz *
L
Figure 36. Oscillator Configuration
XTAL1
XTAL2
P R E L I M I N A R Y
CC
C1
and
RC
@ 3V VCC (TYP)
C1 = 33 pF *
R = 1K *
1. Power Fail to Power OK status.
2. Stop-Mode Recovery (if D5 of SMR = 1).
3. WDT Time-Out.
The POR time is a nominal 5 ms. Bit 5 of the Stop-Mode
Register determines whether the POR timer is bypassed
after Stop-Mode Recovery (typical for external clock, RC,
LC oscillators).
STOP. This instruction turns off the internal clock and ex-
ternal crystal oscillation and reduces the standby current
to 10 A (typical) or less. STOP mode is terminated only
by a reset, such as WDT time-out, POR, SMR, or external
reset. This causes the processor to restart the application
program at address 000CH. In order to enter STOP (or
HALT) mode, it is necessary to first flush the instruction
pipeline to avoid suspending execution in mid-instruction.
To do this, the user must execute a NOP (opcode = FFH)
immediately before the appropriate sleep instruction, i.e.,
or
R
XTAL1
XTAL2
FF
6F
FF
7F
C1
C2
NOP
STOP
NOP
HALT
32 kHz XTAL
C1 = 20 pF, C = 33 pF
Rd = 56 - 470K
Rf =10 M
Rd
; clear the pipeline
; enter STOP mode
; clear the pipeline
; enter HALT mode
Rf
XTAL1
XTAL2
Z86C72/C92/L72/L92
IR Microcontroller
External Clock
XTAL1
XTAL2
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