x5083s8izt2 Intersil Corporation, x5083s8izt2 Datasheet
x5083s8izt2
Related parts for x5083s8izt2
x5083s8izt2 Summary of contents
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Data Sheet CPU Supervisor with 8Kbit SPI EEPROM This device combines four popular functions, Power-on Reset Control, Watchdog Timer, Supply Voltage Supervision, and Block Lock Serial EEPROM Memory in one package. This combination lowers system cost, reduces board space ...
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Typical Application 2.7-5.0V VCC 10K X5083 RESET CS SCK VSS Block Diagram TRIP WATCHDOG TRANSITION DETECTOR CS/WDI COMMAND SI DECODE & SO CONTROL LOGIC SCK WP PROTECT LOGIC 2 X5083 VCC uC ...
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Ordering Information PART NUMBER RESET (ACTIVE LOW) PART MARKING X5083P-4.5A X5083P AL X5083PZ-4.5A (Note) X5083P ZAL X5083PI-4.5A X5083P AM X5083PIZ-4.5A (Note) X5083P ZAM X5083S8-4.5A X5083 AL X5083S8Z-4.5A (Note) X5083 ZAL X5083S8I-4.5A* X5083 AM X5083S8IZ-4.5A* (Note) X5083 ZAM X5083V8-4.5A 583 AL ...
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Ordering Information (Continued) PART NUMBER RESET (ACTIVE LOW) PART MARKING X5083P-2.7 X5083P F X5083PZ-2.7 (Note) X5083P ZF X5083PI-2.7 X5083P G X5083PIZ-2.7 (Note) X5083P ZG X5083S8-2.7* X5083 F X5083S8Z-2.7* (Note) X5083 ZF X5083S8I-2.7* X5083 G X5083S8IZ-2.7* (Note) X5083 ZG X5083V8-2.7 583 ...
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Principles of Operation Power-on Reset Application of power to the X5083 activates a power-on reset circuit. This circuit goes LOW at 1V and pulls the RESET pin active. This signal prevents the system microprocessor from starting to operate with insufficient ...
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SCK SI 06h WREN FIGURE 1. SET SCK SI 06h WREN FIGURE 2. RESET Adjust V ...
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New V Applied = CC Old V Applied + Error CC NO Error ≤ –Emax Emax = Maximum Desired Error FIGURE 4. V TRIP 7 X5083 V Programming TRIP Execute Reset V TRIP Sequence Set Applied = ...
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SPI Serial Memory The memory portion of the device is a CMOS serial EEPROM array with Intersil’s block lock protection. The array is internally organized The device features a Serial Peripheral Interface (SPI) and software protocol allowing ...
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Watchdog Timer The watchdog timer bits, WD0 and WD1, select the watchdog time out period. These nonvolatile bits are programmed with the WRSR instruction. A change to the Watchdog Timer, either setting a new time out period or turning it ...
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Data Protection The following circuitry has been included to prevent inadvertent writes: • A WREN instruction must be issued to set the write enable latch. • CS must come HIGH at the proper clock count in order to start a ...
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CS SCK SI High Impedance SCK Instruction SCK Data Byte FIGURE 8. ...
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SCK READ STATUS INSTRUCTION SI NONVOLATILE WRITE IN PROGRESS SO SO MSB HIGH while in the Nonvolatile write cycle SCK READ STATUS ...
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CS SCK SI Non-volatile Write Operation FIGURE 11. END OF NONVOLATILE WRITE (NO POLLING) Symbol Table WAVEFORM INPUTS OUTPUTS Must be Will be steady steady May change Will change from LOW from LOW to HIGH to HIGH May change Will ...
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Absolute Maximum Ratings Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . .-65°C to 135°C Storage Temperature . . . . . . . . ...
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Equivalent A.C. Load Circuit 1.64kΩ SO OUTPUT 1.64kΩ 100pF AC Electrical Specifications (Over recommended operating conditions, unless otherwise specified) SYMBOL DATA INPUT TIMING f Clock frequency SCK t Cycle time CYC t CS lead time LEAD ...
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Serial Output Timing CS SCK MSB Out ADDR SI LSB IN Serial Input Timing CS t LEAD SCK MSB IN High Impedance SO Power-Up and Power-Down Timing V TRIP PURST 0 ...
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RESET Output Timing SYMBOL V Reset trip point voltage, X5083PT-4.5A (Note 6) TRIP Reset trip point voltage, X5083PT Reset trip point voltage, X5083PT-2.7A Reset trip point voltage, X5083PT-2.7 t Power-up reset time out PURST t (Note 5) V detect to ...
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V Programming Timing Diagram TRIP TRIP VPS CS SCK SI 06h WREN V Programming Parameters TRIP PARAMETER t V program enable voltage setup time VPS TRIP t V program enable voltage ...
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Small Outline Package Family (SO PIN #1 I.D. MARK 0.010 SEATING PLANE 0.004 C 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) SYMBOL SO-8 SO-14 ...
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Plastic Dual-In-Line Packages (PDIP) D SEATING PLANE MDP0031 PLASTIC DUAL-IN-LINE PACKAGE SYMBOL PDIP8 PDIP14 A 0.210 0.210 A1 0.015 0.015 A2 0.130 0.130 b 0.018 0.018 b2 0.060 0.060 c 0.010 0.010 D 0.375 0.750 E 0.310 ...
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... Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...