ata5780 ATMEL Corporation, ata5780 Datasheet - Page 13

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ata5780

Manufacturer Part Number
ata5780
Description
Uhf Ask/fsk Receiver
Manufacturer
ATMEL Corporation
Datasheet

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4.2
4.2.1
4.3
4.3.1
9207BS–RKE–01/11
Fractional-N PLL and VCO
Receive Path
VCO Calibration
Overview
The VCO calibration must be enabled in the EEPROM (register CALCONF1 bit
VCOCALE = 1). The maximum time for the calibration routine is approx. 150µs. The operating
frequency of the VCO is approx. 1.5GHz to 2.0GHz
The front-end register FEVCT contains the 4bit digital control word for the VCO.
Two LNAs, for high band and low band respectively, are provided for optimal matching for
each frequency range.
An RF detector is included after the LNA successfully detects overload of the receiver by a
blocker. An overload event of this kind can be read out from the FE_SPI address space. A
switch with 0dB/15dB damping is included to allow reception in the presence of strong block-
ers. The damping is switched on and off by a control register bit located in the FE_SPI
address.
This detector is activated during the PLL start and the result is used to control the damping
switches located in front of the LNA to reduce the LNA overload (the LNA is the first over-
loaded component in the reception path, damping after LNA therefore does not increase
large-signal capability).
Damping 15dB before the LNA therefore causes a sensitivity loss of 15dB but enables the
receiver to receive data in the presence of modulated blockers 15dB exceeding
I1dBKP = –35dBm. This means, for example, that at 165kHz IF bandwidth and a modulated
blocker with a peak value of –17dBm at a distance of 5MHz, reception of a signal with 20kBit/s
±20kHz dev is possible with a sensitivity of –91dBm.
The resistors and capacitors in the process technology used have a tolerance of about 20%.
Digital correction is performed on-chip to ensure accurate resistors and capacitors and enable
their use as a reference resistor for the PA, as load capacitors for the XTO, and as an accurate
loop filter for the PLL.
The resistors are calibrated with an on-chip reference resistor and the result is stored in the
factory-locked EPROM (XRow). The capacitor is calibrated by the frequency deviation in the
XTO and the result is stored in the factory-locked EEPROM, resulting in highly accurate inte-
grated load capacitors for the XTO and less accurate capacitors in the loop filter.
In RX mode the receiver is sensitive to signals coming from one corresponding transmitter
(RKE1, 2, 3, TPM or RS channel). RX mode is started after power on if it is preselected in the
EEPROM or if it can be started with an SPI command.
Atmel ATA5780 [Preliminary]
13

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