ata5780 ATMEL Corporation, ata5780 Datasheet - Page 20

• Manufacturer Part Number: ata5780
• Description: Uhf Ask/fsk Receiver
• Manufacturer: ATMEL Corporation

Figure 4-4.
4.5.4.1
4.5.4.2
4.5.4.3
20
NPWRON
NPWRON
NRESET
PWRON
VS
....
N
1
Atmel ATA5780 [Preliminary]
AVCC Voltage Supervision
Watchdog Reset
External NRESET
Reset Logic
....
Port_wake
The AVCC voltage is enabled by the AVEN flag in the SUPCR. Two thresholds are defined for
AVCC voltage monitoring:
Both thresholds have a hysteresis and trigger a signal with a guaranteed minimum pulse to
allow proper operation.
When the watchdog times out, it will generate a short reset pulse of one CK cycle duration. On
the falling edge of this pulse, the delay timer starts counting the time-out period t
An external reset is generated by a low level on the NRESET pin. Reset pulses falling below
the minimum pulse width will generate a reset, even if the clock is not running. Shorter pulses
do not necessarily generate a reset. When the applied signal reaches the reset threshold volt-
age - VRST - on its positive edge, the delay counter starts the MCU after the time-out period -
t
TOUT
• Th_RST_AVCC - indicates that the voltage is below the safe operating range of the digital
• Th_avcc_low - the voltage is below the safe operating voltage of the analog RF front end
circuits
circuits
- has elapsed.
DVCC/VMEM
Spike
Filter
control
Supply
registers
Control
&
CAL_RDY
DVCC/VMEM
Circuit
Reset
Calibration
registers
Reset
&
calibration
SRC-Oscillator
FRC-Oscillator
Watchdog
Timer
DATA BUS
RST_DVCC
Register (MCUSR)
MCU Status
Delay Counters
TIMEOUT
S
R
9207BS–RKE–01/11
TOUT
Q
.