x45620 Intersil Corporation, x45620 Datasheet - Page 19

• Manufacturer Part Number: x45620
• Description: Dual Voltage Monitor With Integrated System Battery Switch And Eeprom
• Manufacturer: Intersil Corporation

Table 3. Write Protect Enable Bit and WP Pin Function
Writing to the Control Register
Changing any of the nonvolatile bits of the control regis-
ter requires the following steps:
– Write a 02H to the CR to set the Write Enable Latch
– Write a 06H to the CR to set both the Register Write
– Write a value to the CR that has all the control bits set
– A read operation occurring between any of the previ-
– The RWEL bit cannot be reset without writing to the
– Changes made to the Control Register non-volatile
– Changes made to volatile bits in the Register take
HIGH
HIGH
LOW
(WEL). This is a volatile operation, so there is no
delay after the write. (Operation preceeded by a start
and ended with a stop).
Enable Latch (RWEL) and the WEL bit. This is also a
volatile cycle. The zeros in the data byte are required.
(Operation preceeded by a start and ended with a
stop).
to the desired state, with the WEL bit set to ‘1’ and the
RWEL bit set to ‘0’. This can be represented as nqrs
t01u in binary, where n is the WPEN bit and qrstu are
the WD1, WD0, BP1, BP0 and PUP bits. (Operation
preceeded by a start and ended with a stop). Since
this is nonvolatile write cycle it will take up to 10ms to
complete. The RWEL bit is reset by this cycle and the
sequence must be repeated to change the nonvolatile
bits again. If bit 2 is set to ‘1’ in this third step (nqrs
t11u) then the RWEL bit remains set and the WPEN,
PUP, WD1, WD0, BP1 and BP0 bits remain
unchanged.
ous operations will not interrupt the register write
operation.
nonvolatile control bits in the control register, power
cycling the device or attempting a write to a write pro-
tected block.
bits become effective upon the next read operation of
the control register. (Power cycling will also activate
changes to the control register).
effect immediately following the last data bit.
WP
WPEN
X
0
1
Memory Array Not
Block Protected
Writes OK
Writes OK
Writes OK
19
Block Protected
Memory Array
Writes Blocked
Writes Blocked
Writes Blocked
X45620
To illustrate, a sequence of writes to the device consist-
ing of [02H, 06H, 02H] will reset all of the nonvolatile
bits to 0 and clear the RWEL bit. A sequence of [02H,
06H, 06H] will leave the nonvolatile bits unchanged and
the RWEL bit remains set.
When resetting the WEL bit, the operation goes active
immediately following the last data bit. The device will,
therefore, not respond with an ACK after the reset WEL
command data byte.
OPERATIONAL NOTES
The device powers-up in the following state:
– The device is in the low power standby state.
– A “Start Bit” is required to enter an active state to
– The Write Enable Latch (WEL) is reset.
– The RESET Signal is active for t
Data Protection
The following circuitry has been included to prevent
inadvertent writes:
– The WEL bit must be set before writing to the
– The WEL and RWEL bits must be set before writing
– A valid slave byte and two address bytes must be
– A “Stop Bit” must be received following a multiple of
– During the time RESET is active communication to
Block Lock Bits
Writes Blocked
receive an instruction.
memory array.
to the nonvolatile bits of the Control Register.
sent to the device with a valid ACK between each
byte.
8 data bits and completion of the data ACK bit.
the device are ignored.
Writes OK
Writes OK
Writes Blocked
WPEN Bit
Writes OK
Writes OK
PURST
Protection
Hardware
Software
Software
.
July 29, 2005
FN8250.0