tc59lm906amg TOSHIBA Semiconductor CORPORATION, tc59lm906amg Datasheet - Page 49

• Manufacturer Part Number: tc59lm906amg
• Description: Mos Digital Integrated Circuit Silicon Monolithic
• Manufacturer: TOSHIBA Semiconductor CORPORATION

FUNCTIONAL DESCRIPTION
Network FCRAM
perform fast random core access, low latency and high-speed data transfer.
PIN FUNCTIONS
CLOCK INPUTS: CLK &
edge of CLK . The DQS and DQ output are aligned to the crossing point of CLK and CLK . The timing reference
point for the differential clock is when the CLK and CLK signals cross during a transition.
POWER DOWN:
Suspend function like a CKE input of a standard SDRAMs, therefore it is illegal to bring PD pin into low state if
any Read or Write operation is being performed.
CHIP SELECT & FUNCTION CONTROL:
mode is decided by the combination of the two consecutive operation commands using the CS and FN inputs.
BANK ADDRESSES: BA0~BA2
bank to be used for the operation. BA0 and BA1 also define which mode register is loaded during the Mode Register
Set command (MRS or EMRS).
CS , FN and all address input signals are sampled on the crossing of the positive edge of CLK and the negative
FCRAM
The CLK and CLK inputs are used as the reference for synchronous operation. CLK is master clock input. The
The PD input controls the entry to the Power Down or Self-Refresh modes. The PD input does not have a Clock
The CS and FN inputs are a control signal for forming the operation commands on FCRAM
The BA0 to BA2 inputs are latched at the time of assertion of the RDA or WRA command and are selected the
backward compatibility to 256Mb (4bank) Network FCRAM.
ADDRESS INPUTS: A0~A13
Upper Addresses with Bank addresses are latched at the RDA or WRA command and the Lower Addresses are
latched at the LAL command. The A0 to A13 inputs are also used for setting the data in the Regular or
Extended Mode Register set cycle.
Address inputs are used to access the arbitrary address of the memory cell array within each bank. The
Also, when BA2 input assign to A14 input, TC59LM914/06AMG can function as 4 bank devices and can keep
TM
is an acronym of Fast Cycle Random Access Memory. The Network FCRAM
8 bank operation
4 bank operation
TM
PD
Bank #0
Bank #1
Bank #2
Bank #3
Bank #4
Bank #5
Bank #6
Bank #7
CLK
I/O organization
16 bits
16 bits
8 bits
8 bits
BA0
0
1
0
1
0
1
0
1
CS
& FN
UPPER ADDRESS
A0~A13, BA2(A14)
A0~A13, BA2(A14)
A0~A13
A0~A13
BA1
0
0
1
1
0
0
1
1
TC59LM914/06AMG-37,-50
LOWER ADDRESS
A0~A8
A0~A7
A0~A8
A0~A7
BA2
0
0
0
0
1
1
1
1
2004-08-20 49/59
TM
TM
. Each operation
is competent to
Rev 1.0