xrt83l30 Exar Corporation, xrt83l30 Datasheet - Page 64

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xrt83l30

Manufacturer Part Number
xrt83l30
Description
Xrt83l30 -single-channel T1/e1/j1 Long-haul, Short-haul Line Interface Unit
Manufacturer
Exar Corporation
Datasheet

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XRT83L30
SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
R
EGISTER
10000
B
D7
D6
D5
D4
D3
D2
D1
D0
IT
A
#
DDRESS
Reserved
Reserved
SRESET
RCLKE
ATAOS
TCLKE
SR/DR
DATAP
N
AME
T
ABLE
34: M
Single-rail/Dual-rail Select: Writing a "1" to this bit configures
the XRT83L30 to operate in the Single-rail mode.
Writing a "0" configures the XRT83L30 to operate in Dual-rail
mode.
Automatic Transmit All Ones Upon RLOS: Writing a "1" to this
bit enables the automatic transmission of All Ones data to the
line.
Writing a "0" disables this feature.
Receive Clock Edge: Writing a "1" to this bit selects receive out-
put data to be updated on the negative edge of RCLK.
Writing a "0" selects data to be updated on the positive edge of
RCLK.
Transmit Clock Edge: Writing a "0" to this bit selects transmit
data at TPOS/TDATA and TNEG to be sampled on the falling
edge of TCLK.
Writing a "1" selects the rising edge of the TCLK for sampling.
DATA Polarity: Writing a "0" to this bit selects transmit input and
receive output data of the XRT83L30 to be active "High".
Writing a "1" selects an active "Low" state.
Software Reset µ P Registers: Writing a "1" to this bit longer
than 10µs resets all internal state machines
ICROPROCESSOR
61
R
EGISTER
F
UNCTION
#16
BIT DESCRIPTION
R
EGISTER
T
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
YPE
REV. 1.0.1
R
V
ALUE
ESET
0
0
0
0
0
0
0
0

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