ald500rau Advanced Linear Devices Inc (ALD), ald500rau Datasheet
ald500rau
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ald500rau Summary of contents
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... AGND REF REF 9 N/C 10 N/C QE, PE, SE PACKAGE * N/C pin is connected internally. Connect Package Type 20L QSOP 20LCDIP ALD500R-50QE ALD500RA-20QE ALD500RAU-20QE ALD500RA-10QE ALD500RAU-10QE ALD500RA-20QEI ALD500RAU-20QEI ALD500RAU-20DE DGND 17 C OUT ...
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... (13) GENERAL DESCRIPTION The ALD500RAU/ALD500RA/ALD500R are integrating dual slope analog processors, designed to operate on 5V power supplies for building precision analog-to-digital converters. The ALD500RAU/ALD500RA/ALD500R feature specifications suitable for 18 bit/17 bit/16 bit resolution conversion, respectively. Together with three capacitors, two resistors, and a digital controller, a precision Analog to Digital converter with auto zero can be implemented ...
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... Unknown time period over which a known DINT ANALOG INPUT ( VOLTAGE REFERENCE ALD500RAU/ALD500RA/ALD500R V REF C INT R INT Actual data conversion is accomplished in two phases: Input Signal Integration Phase and Reference Voltage Deintegration Phase. The integrator output is initialized to 0V prior to the start of Input Signal Integration Phase. During Input Signal Integration ...
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... Notes 1, 2 0.020 +70 C 0.003 0.008 % Notes 1, 2 0.015 +70 C 0.3 0 +70 C 0.15 0.35 ppm/ C Notes 0.012 % 1.3 ppm +70 C Note -1 -0 AGND = ALD500RAU/ALD500RA/ALD500R ...
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... Positive Input Signal C OUT NOT VALID Negative Input Signal Auto Zero Phase Clock data in or clock data out of counters within the the microcontroller or fixed logic controller, START as needed. CONVERSION CYCLE START INTEGRATION CYCLE ALD500RAU/ALD500RA/ALD500R = C AZ 500RAU 500RA Typ Max Min Typ Max 0.6 1.0 0.6 1 5.5 4 ...
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... 2.0V Full Scale INT characteristics. ~ REF AZ Advanced Linear Devices = 0. 100K (1% metal film) REF REF 500RAU-50 Unit 500RA-50 500R-50 Min Typ Max 1.000 1.005 ppm/C -0.08 ppm/ 1000hrs 10 min. 5.5 4.5 5.5 V -4.5 -5.5 -4 ALD500RAU/ALD500RA/ALD500R Test Conditions Note 7 Note 7 Note 7 ...
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... Integrator Output Zero *SW + would be closed for a positive input signal ALD500RAU/ALD500RA/ALD500R is HIGH during the Integration phase when a positive input voltage is being integrated and OUT is undefined during the Auto-Zero phase. It should be monitored to OUT Logic 1 = power on. Logic 0 = power down. Switch Functions ...
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... The Integrator Output Zero phase should be activated (AB = 00) until C high. At this point, the integrator output is near zero. Auto Zero Phase should be entered (AB = 01) and the ALD500RAU/ ALD500RA/ALD500R is held in this state until the next conversion cycle. Advanced Linear Devices ...
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... Phase Control Inputs (A, B) The A and B logic inputs select the ALD500RAU/ALD500RA/ ALD500R operating phase. The A and B inputs are normally driven by a microprocessor I/O port or external logic, using CMOS logic levels. For logic control functions of A and B logic inputs, see Table 1 ...
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... C REF C and C AZ REF Calculate V REF The reference deintegration voltage is calculated using: V REF The ALD500RAU/ALD500RA/ALD500R requires an external is a INT order to operate properly. This R REF metal film 100K resistor, 50 ppm/C. Any other loading must . REF be high impedance ( 100M ). Converter Noise The converter noise is the total algebraic sum of the integrator ...
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... MAX DINT For t MAX = DINT INT equation (9) becomes MAX INT INT V = REF 2t INT ALD500RAU/ALD500RA/ALD500R DESIGN EXAMPLES We now apply these equations in the following design examples (1) DINT Design Example INT INT 1. Pick resolution = 16 bit. 2. Pick t t DINT (2) C INT (2a) 3 ...
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... INT range = 100 K For INT - (0.133333 INT = C = 0.67 F REF 266.667 msec. DINT INT as shown in Design Example 1, REF substituting the appropriate values MAX R INT INT INT V = REF t MAX DINT ~ = 1.005V ALD500RAU/ALD500RA/ALD500R ~ -6 )/4 = 0.67 F ...