ald500rau Advanced Linear Devices Inc (ALD), ald500rau Datasheet - Page 10

• Manufacturer Part Number: ald500rau
• Description: Precision Integrating Analog Processor With Precision Voltage Reference - Advanced Linear Devices
• Manufacturer: Advanced Linear Devices Inc (ALD)

APPLICATIONS AND DESIGN NOTES
Determination and Selection of System Variables
The procedure outlined below allows the user to determine the
values for the following ALD500RAU/ALD500RA/ALD500R
system design variables:
System Timing
Figure 3 and Figure 4 show the overall timing for a typical
system in which ALD500RAU/ALD500RA/ALD500R is
interfaced to a microcontroller. The microcontroller drives the
A, B inputs with I/O lines and monitors the comparator output,
C
It may be necessary to monitor the state of the comparator
output in addition to having it control a timer directly during the
Reference Deintegration Phase.
There are four critical timing events: sampling the input
polarity; capturing the deintegration time; minimizing overshoot
and properly executing the Integrator Output Zero Phase.
Selecting Input Integration Time
For maximum 50/60 cycle noise rejection, Input Integration
Time must be picked as a multiple of the period of line
frequency. For example, t
100 msec maximize 60Hz line rejection, and 20msec, 40
msec, 80msec, and 100 msec maximize 50Hz line rejection.
Note that t
line rejection.
INT and D
The duration of the Reference Deintegrate Phase (D
function of the amount of voltage charge stored on the
integrator capacitor during INT phase, and the value of V
The D
phase and terminated when an integrator output zero-crossing
is detected. In general, the maximum number of counts
chosen for D
with V
example, V
voltage.
Integrating Resistor (R
The desired full-scale input voltage and amplifier output
current capability determine the value of R
integrator amplifiers each have a full-scale current of 20 A.
The value of R
OUT
10
, using an I/O line or dedicated timer-capture control pin.
REF
INT
(1) Determine Input Voltage Range
(2) Clock Frequency and Resolution Selection
(3) Input Integration Phase Timing
(4) Integrator Timing Components (R
(5) Auto Zero and Reference Capacitors
(6) Voltage Reference
R
phase must be initiated immediately following INT
INT
chosen as a maximum voltage relative to V
INT
INT
REF
INT
of 100 msec maximizes both 60 Hz and 50Hz
Phase Timing
INT
phase is twice to three times that of INT phase
= V
= V
is therefore directly calculated as follows:
IN
IN
(max)/2 would be a good reference
INT
MAX / 20 A
INT
)
times of 33msec, 66msec and
INT
. The buffer and
INT
, C
Advanced Linear Devices
INT
INT)
IN
)
. For
REF
is a
.
where:
For minimum noise and maximum linearity, R
the range of between 50k to 150k
Integrating Capacitor (C
The integrating capacitor should be selected to maximize
integrator output voltage swing V
time, without output level saturation. For +/-5V supplies,
recommended V
Using the 20 A buffer maximum output current, the value of
the integrating capacitor is calculated as follows:
where: t
It is critical that the integrating capacitor must have a very low
dielectric absorption, as charge loss or gain during conversion
directly converts into an error voltage. Polypropylene capacitors
are recommended while Polyester and Polybicarbonate
capacitors may also be used in less critical applications.
Reference (C
C
polypropylene types). The slower the conversion rate, the
larger the value C
values for C
C
Calculate V
The reference deintegration voltage is calculated using:
The ALD500RAU/ALD500RA/ALD500R requires an external
R
metal film 100K resistor, 50 ppm/C. Any other loading must
be high impedance ( 100M ).
Converter Noise
The converter noise is the total algebraic sum of the integrator
noise and the comparator noise. This value is typically 14 V
peak to peak. The higher the value of the reference voltage,
the lower the converter noise. Such sources of noise errors
can be reduced by increased integration times, which effectively
filter out any such noise. If the integration time periods are
selected as multiples of 50/60Hz frequencies, then 50/60Hz
noise is also rejected, or averaged out. The signal-to-noise
ratio is related to the integration time (t
time constant (R
This converter noise can also be reduced by using multiple
samples and mathematically averaged. For example, taking
16 samples and averaging the readings result in a mathematical
(by software) filtering of noise to less than 4 V.
AZ
REF
REF
S/N (dB) = 20 Log ((V
and C
in order to operate properly. This R
and C
V
R
C
V
V
INT
IN
REF
INT
INT
INT
REF
REF
MAX = Maximum input voltage desired
REF
= (t
AZ
REF
= (V
=
=
may also be used to limit roll-over errors.
and C
INT
INT
INT
) and Auto Zero (C
must be low leakage capacitors (e.g.
= Integrating Resistor value
INT
Input Integration Phase Period
Maximum integrator output
voltage swing
REF
) (C
) . (20 x 10
(full count voltage)
range is between +/- 3 Volt to +/-4 Volt.
) . (C
AZ
INT
must be. Recommended capacitor
INT
are equal to C
INT
INT
) as follows:
/ 14 x 10
ALD500RAU/ALD500RA/ALD500R
)
) . (R
-6
) / V
INT
INT
INT
, for a given integration
-6
) / 2(t
INT
AZ
) . t
.
INT
) Capacitors
) and the integration
REF
. Larger values for
INT
INT
INT
should be a 1%
/(R
)
should be in
INT
. C
INT
))