ald500rau Advanced Linear Devices Inc (ALD), ald500rau Datasheet - Page 2

• Manufacturer Part Number: ald500rau
• Description: Precision Integrating Analog Processor With Precision Voltage Reference - Advanced Linear Devices
• Manufacturer: Advanced Linear Devices Inc (ALD)

GENERAL DESCRIPTION
The ALD500RAU/ALD500RA/ALD500R are integrating
dual slope analog processors, designed to operate on 5V
power supplies for building precision analog-to-digital
converters. The ALD500RAU/ALD500RA/ALD500R
feature specifications suitable for 18 bit/17 bit/16 bit
resolution conversion, respectively. Together with three
capacitors, two resistors, and a digital controller, a precision
Analog to Digital converter with auto zero can be
implemented. The digital controller can be implemented
by an external microcontroller, under either hardware
(fixed logic) or software control. For ultra high resolution
applications, up to 23 bit conversion can be implemented
with an appropriate digital controller and software.
The ALD500R series of analog processors accept
differential inputs and the external digital controller first
counts the number of pulses at a fixed clock rate that a
capacitor requires to integrate against an unknown analog
input voltage, then counts the number of pulses required
to deintegrate the capacitor against a known internal
reference voltage. This unknown analog voltage can then
be converted by the microcontroller to a digital word, which
is translated into a high resolution number, representing
an accurate reading. This reading, when ratioed against
the reference voltage, yields an accurate, absolute voltage
measurement reading.
The ALD500R analog processors consist of on-chip digital
control circuitry to accept control inputs, integrating buffer
amplifiers, analog switches, and voltage comparators and
a highly accurate, ultra-stable voltage reference.
functions in four operating modes, or phases, namely auto
zero, integrate, deintegrate, and integrator zero phases.
At the end of a conversion, the comparator output goes
from high to low when the integrator crosses zero during
deintegration. ALD500R analog processors also provide
direct logic interface to CMOS logic families.
2
R
C B = 0.1 F
REF
= 100K
AGND
V +
(14)
(6)
V -
(13)
IN
IN
SW
C +
SW
SW
(8)
REF
Az
IN
IN
V +
(12)
REF
SW +
FIGURE 1. ALD500R Functional Block Diagram
SW -
SW
R
REF
R
R
C
R
REF
REF
INT
SW
SW +
SW
SW -
R
V -
G
(11)
R
REF
R
V
(3) (19) (10) (9)
SS
V
Advanced Linear Devices
C -
DD
(7)
REF
SW
Control
N/C
Buffer
REF
-
+
S
N/C
SW
It
BUF
(5)
AZ
R
GENERAL THEORY OF OPERATION
Dual-Slope Conversion Principles of Operation
The basic principle of dual-slope integrating analog to digital
converter is simple and straightforward. A capacitor, C
charged with the integrator from a starting voltage, V
fixed period of time at a rate determined by the value of an
unknown input voltage, which is the subject of measurement.
Then the capacitor is discharged at a fixed rate, based on an
external reference voltage, back to V
time, or deintegration time, is measured precisely. Both the
integration time and deintegration time are measured by a
digital counter controlled by a crystal oscillator. It can be
demonstrated that the unknown input voltage is determined
by the ratio of the deintegration time and integration time, and
is directly proportional to the magnitude of the external reference
voltage.
The major advantages of a dual-slope converter are:
integration time t
dependent on their relative ratios. Long-term clock frequency
variations will not affect the accuracy. A standard crystal
controlled clock running digital counters is adequate to generate
very high accuracies.
R
through a conversion cycle, which typically lasts less than 1
second.
as V
and the stability of the voltage reference value.
(1)
I
INT
B
Bias
C
INT and
AZ
C
B
a. Accuracy is not dependent on absolute values of
b. Accuracy is not dependent on the absolute values of
c. Offset voltage values of the analog components, such
d. Accuracy of the system depends mainly on the accuracy
X
Integrator
+
-
, are cancelled out and do not affect accuracy.
C
C
(4)
INT
AZ
C
INT
Analog
Switch
Control
Signals
C
C
(20)
, as long as the component values do not vary
Comp1
INT
(2)
S
+
-
INT
and deintegration time t
Comp2
-
+
Control Logic
Phase
Decoding
Logic
(15)
Polarity
Detection
A
ALD500RAU/ALD500RA/ALD500R
(16)
B
Level
Shift
X
where the discharge
DGND
(18)
C
(17)
OUT
DINT
, but is
X
INT
, for a
, is