ak4342 AKM Semiconductor, Inc., ak4342 Datasheet - Page 17

• Manufacturer Part Number: ak4342
• Description: 24-bit Stereo Dac With Hp-amp & 2v Line-out
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
The AK4342 interfaces with external system via the SDATA, BICK and LRCK pins. Five data formats are supported and
are selected by the DIF2, DIF1 and DIF0 bits (Table 4). Mode 0 is compatible with existing 16bit DACs and digital filters.
Mode 1 is a 20bit version of Mode 0. Mode 4 is a 24bit version of Mode 0. Mode 2 is similar to AKM ADCs and many
DSP serial ports. Mode 3 is compatible with the I
formats are also valid: 16-bit data followed by eight zeros (17th to 24th bits) and 20-bit data followed by four zeros (21st
to 24th bits). In all modes, the serial data is MSB first and 2’s complement format. The polarity of BICK can be inverted
by the BCKP bit, the polarity of LRCK can be inverted by the LRP bit. PMDAC bit should be set to “0” when BCKP or
LRP bits are changed.
MS0506-E-02
DIF2
bit
Serial Data Interface
0
0
0
0
1
SDATA
SDATA
BCPKP bit
LRCK
BICK
(32fs)
BICK
Mode 0
Mode 0
0
0
1
1
DIF1
bit
0
0
1
1
0
DIF0
bit
0
1
0
1
0
15
Don’t care
15:MSB, 0:LSB
LRP bit
0
1
0
1
14
0: 16bit, LSB justified
1: 20bit, LSB justified
2: 24bit, MSB justified
3: I
4: 24bit, LSB justified
2
S Compatible
Figure 12. Mode 0 Timing (BCKP bit = “0”, LRP bit = “0”)
MODE
H: Mode 0,1,2,4
L: Mode 3
L: Mode 0,1,2,4
H: Mode 3
H: Mode 0,1,2,4
L: Mode 3
L: Mode 0,1,2,4
H: Mode 3
6
Lch Data
5
Lch Data
4
Table 5. LRCK and BICK Polarities
15
Table 4. Audio Data Format
LRCK Polarity
3
32fs ≤ BICK ≤ 128fs
32fs ≤ BICK ≤ 64fs
40fs ≤ BICK ≤ 128fs
40fs ≤ BICK ≤ 64fs
48fs ≤ BICK ≤ 128fs
48fs ≤ BICK ≤ 64fs
BICK=32fs
48fs ≤ BICK ≤ 128fs
48fs ≤ BICK ≤ 64fs
48fs ≤ BICK ≤ 128fs
48fs ≤ BICK ≤ 64fs
2
S serial data protocol. In Modes 2 and 3 with BICK≥48fs, the following
14
2
or
L: Mode 0,1,2,4
H: Mode 3
H: Mode 0,1,2,4
L: Mode 3
L: Mode 0,1,2,4
H: Mode 3
H: Mode 0,1,2,4
L: Mode 3
1
0
0
- 17 -
Rch Data
(Half/Normal/Double Speed Mode)
Don’t care
15
14
BICK
(Half/Normal Speed Mode)
(Double Speed Mode)
(Half/Normal Speed Mode)
(Double Speed Mode)
(Half/Normal Speed Mode)
(Double Speed Mode)
(Half/Normal Speed Mode)
(Double Speed Mode)
(Half/Normal Speed Mode)
(Double Speed Mode)
6
Rch Data
(SDATA Latch Timing)
5
BICK Polarity
4
15
3
↑
↑
↓
↓
14
2
Figure 12
Figure 13
Figure 14
Figure 15
Figure 13
Figure
1
0
0
15
Default
[AK4342]
Default
2006/07
14