ak4368 AKM Semiconductor, Inc., ak4368 Datasheet - Page 35

• Manufacturer Part Number: ak4368
• Description: Dac With Built-in Pll & Hp-amp
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
2) DAC → Lineout
(1) PDN pin should be set to “H” at least 150ns after power is supplied.
(2) PMVCM bit should be changed to “1” after the PDN pin goes “H”.
(3) DACL and DACR bits should be changed to “1” after the PMVCM bit is changed to “1”.
(4) When the 3D function is used, 3D1-0 bits should be changed to “01” after DACL and DACR bits are changed to “1”.
(5) When the 3D function is not used, the PMDAC and PMLO bits should be changed to “1” after the DACL and DACR
(6) External clocks (MCKI, BICK, LRCK) are needed to operate the DAC. When the PMDAC bit = “0”, these clocks
(7) When the PMLO bit is changed, pop noise is output from LOUT/ROUT pins.
(8) Analog output corresponding to the digital input has a group delay (GD) of 22fs(=499µs@fs=44.1kHz).
(9) The ATS bit sets the transition time of the digital attenuator. Default value is 1061/fs(=24ms@fs=44.1kHz).
MS0529-E-00
bits are changed to “1”. When the 3D function is used, the PMDAC and PMLO bits should be changed to “1” after
3D1-0 bits are changed to “01”.
can be stopped. The LOUT/ROUT buffer can operate without these clocks.
Clock Input
PMDAC bit
DAC Internal
SDTI pin
3D1-0 bits
(when 3D is used)
Power Supply
PDN pin
PMVCM bit
DACL,
DACR bits
PMLO bit
ATTL/R7-0 bits
LMUTE,
ATTS3-0 bits
LOUT/ROUT pins
State
Figure 27. Power-up/down sequence of DAC and LOUT/ROUT (Don’t care: except Hi-Z)
“00”(3D OFF)
PD(Power-down)
(1) >150ns
10H(MUTE)
(Hi-Z)
(3) >0
Don’t care
00H(MUTE)
(2)
>0
(4) >0
(5) >0 (at 3D OFF)
(6)
(5) >0 (at 3D ON)
(7)
(8) GD
Normal Operation
“01”(3D ON)
FFH(0dB)
(9) 1061/fs
- 35 -
(8)
(9)
0FH(0dB)
00H(MUTE)
(7)
Don’t care
Don’t care
(Hi-Z)
“00”
PD
(7)
Normal Operation
(8)
“01”
(9)
FFH(0dB)
[AK4368EG]
2006/07