ak4372 ETC-unknow, ak4372 Datasheet - Page 24
ak4372
Manufacturer Part Number
ak4372
Description
Dac With Built-in Pll & Hp-amp
Manufacturer
ETC-unknow
Datasheet
1.AK4372.pdf
(62 pages)
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Mode
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The AK4372 interfaces with external systems via the SDATA, BICK and LRCK pins. Five data formats are available,
selected by setting the DIF2, DIF1 and DIF0 bits
filters. Mode 1 is a 20-bit version of Mode 0. Mode 4 is a 24-bit version of Mode 0. Mode 2 is similar to AKM ADCs and
many DSP serial ports. Mode 3 is compatible with the I
following formats are also valid: 16-bit data followed by eight zeros (17th to 24th bits) and 20-bit data followed by four
zeros (21st to 24th bits). In all modes, the serial data is MSB first and 2’s complement format.
When master mode and BICK=32fs(BF bit = “0”), the AK4372 cannot be set to Mode 1 Mode 2 or Mode 4.
MS0684-E-02
0
1
2
3
4
Serial Data Interface
SDATA
SDATA
SDATA
LRCK
BICK
SDATA
LRCK
BICK
(32fs)
BICK
Mode 4
Mode 1
Mode 0
Mode 0
DIF2
0
0
0
0
1
DIF1
23:MSB, 0:LSB
Don’t care
19:MSB, 0:LSB
Don’t care
Don’t care
15:MSB, 0:LSB
15
0
0
1
1
0
14
DIF0
0
1
0
1
0
23
Figure 18. Mode 1, 4 Timing (LRP = BCKP bits = “0”)
6
Figure 17. Mode 0 Timing (LRP = BCKP bits = “0”)
Lch Data
Lch Data
2: 24bit, MSB justified
0: 16bit, LSB justified
1: 20bit, LSB justified
4: 24bit, LSB justified
22
5
3: I
21
2
4
S Compatible
Format
20
Table 16. Audio Data Format
15
3
(Table
19
19
14
2
1
16). Mode 0 is compatible with existing 16-bit DACs and digital
2
S serial data protocol. In Modes 2 and 3 with BICK≥48fs, the
0
0
0
0
- 24 -
BICK=32fs or 48fs ≤ BICK ≤ 64fs
Don’t care
Don’t care
Don’t care
15
14
32fs ≤ BICK ≤ 64fs
40fs ≤ BICK ≤ 64fs
48fs ≤ BICK ≤ 64fs
48fs ≤ BICK ≤ 64fs
BICK
23
6
Rch Data
Rch Data
22
5
21
4
20
15
3
19
19
14
2
Figure 17
Figure 18
Figure 19
Figure 20
Figure 18
1
Figure
0
0
0
0
15
[AK4372]
2008/12
(default)
14
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