sp3223ebcy-tr Exar Corporation, sp3223ebcy-tr Datasheet - Page 10

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sp3223ebcy-tr

Manufacturer Part Number
sp3223ebcy-tr
Description
Sp3223eb -intelligent +3.0v To +5.5v Rs-232 Transceivers
Manufacturer
Exar Corporation
Datasheet
Receivers
The receivers convert ±5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels.
Receivers have an inverting output that can be
disabled by using the EN pin.
Receivers are active when the AUTO ON-LINE
circuitry is enabled or when in shutdown.
During the shutdown, the receivers will continue
to be active. If there is no activity present at the
receivers for a period longer than 100µs or when
SHUTDOWN is enabled, the device goes into a
standby mode where the circuit draws 1µA.
Driving EN to a logic HIGH forces the outputs of
the receivers into high-impedance. The truth
table logic of the SP3223 driver and receiver
outputs can be found in Table 2.
Since receiver input is usually from a transmis-
sion line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, an internal 5KΩ pulldown resistor
to ground will commit the output of the receiver
to a HIGH state.
Table 2. SHUTDOWN and EN Truth Tables
Note: In AUTO ON-LINE
GND and SHUTDOWN = V
if there is no activity present at the Receiver inputs.
Date: 10/06/06
S
H
U
T
0
0
D
1
1
O
W
N
D
E
V
E
0
0
1
1
C I
N
: E
CC
®
S
, the device will shut down
Mode where ONLINE =
P
3
T
H
H
A
A
2
X
g i
g i
2
c
c
O
v i t
v i t
3
h
h
U
e
e
Z
Z
T
SP3223 +3.0V to +5.5V RS-232 Transceivers
R
H
H
A
A
X
g i
g i
c
c
O
v i t
v i t
h
h
U
e
e
Z
Z
T
®
10
Charge Pump
The charge pump is a Sipex–patented design
(U.S. 5,306,954) and uses a unique approach
compared to older less–efficient designs. The
charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
Figure 14. Loopback Test Circuit for RS-232 Driver
Data Transmission Rates
Figure 15. Loopback Test Circuit result at 235Kbps
(All Drivers Fully Loaded)
R1 OUT
T1 OUT
T1 IN
To µP Supervisor
Circuit
TTL/CMOS
TTL/CMOS
OUTPUTS
INPUTS
C2
C1
C5
V
CC
+
+
+
0.1µF
0.1µF
0.1µF
20
14
11
1
2
4
5
6
C1+
C1-
C2+
C2-
T
R
R
EN
SHUTDOWN
T
ONLINE
STATUS
1
X
1
X
IN
OUT
IN
OUT
SP3223
+3V to +5V
V
GND
CC
19
18
5KΩ
5KΩ
© Copyright 2006 Sipex Corporation
T
T
1
X
R
R
OUT
OUT
X
1
V+
IN
IN
V-
3
7
1000pF
C3
C4
+
+
0.1µF
0.1µF
1000pF

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