xr16m681 Exar Corporation, xr16m681 Datasheet - Page 30

• Manufacturer Part Number: xr16m681
• Description: 1.62v To 3.63v Uart With 32-byte Fifo And Vlio Interface
• Manufacturer: Exar Corporation

XR16M681
1.62V TO 3.63V UART WITH 32-BYTE FIFO AND VLIO INTERFACE
The Line Control Register is used to specify the asynchronous data communication format. The word or
character length, the number of stop bits, and the parity are selected by writing the appropriate bits in this
register.
LCR[1:0]: TX and RX Word Length Select
These two bits specify the word length to be transmitted or received.
LCR[2]: TX and RX Stop-bit Length Select
The length of stop bit is specified by this bit in conjunction with the programmed word length.
LCR[3]: TX and RX Parity Select
Parity or no parity can be selected via this bit. The parity bit is a simple way used in communications for data
integrity check. See
•
•
4.6
FCR B
Logic 0 = No parity.
Logic 1 = A parity bit is generated during the transmission while the receiver checks for parity error of the
data character received.
0
0
1
1
IT
Line Control Register (LCR) - Read/Write
-7
FCR B
T
ABLE
0
1
0
1
Table 10
IT
-6
9: T
FCR B
RANSMIT AND
for parity selection summary below.
0
0
1
1
BIT-1
BIT-2
IT
0
0
1
1
0
1
1
-5
FCR
R
ECEIVE
0
1
0
1
BIT
LENGTH
BIT-0
5,6,7,8
W
6,7,8
0
1
0
1
-4
ORD
5
FIFO T
R
ECEIVE
30
RIGGER
L
EVEL
16
24
28
8
T
S
RIGGER
W
TOP BIT LENGTH
(B
ORD LENGTH
5 (default)
1 (default)
T
IT TIME
ABLE AND
1-1/2
6
7
8
2
T
(
S
RIGGER
))
T
RANSMIT
L
16
24
30
8
EVEL
L
EVEL
S
ELECTION
16C650A, 16V2650,
16M2650
C
OMPATIBILITY
REV. 1.0.0