xr82c684 Exar Corporation, xr82c684 Datasheet - Page 49
xr82c684
Manufacturer Part Number
xr82c684
Description
Cmos Quad Channel Uart Quart
Manufacturer
Exar Corporation
Datasheet
1.XR82C684.pdf
(107 pages)
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XR82C684
Most Significant Byte
Least Significant Byte
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Table 10. The Relationship Between the Contents of the Interrupt Vector Registers (of the QUART)
and the Location of the Interrupt Service Routine (Z-80 CPU)
Note: The LSB of the IVR is always set to “0” once read by the CPU. Interrupt Service Routines must begin at even addresses.
Z80 CPU
XR82C684
Figure 23. Schematic of an Approach to Interface the QUART to the Z-80 CPU (for Z-Mode Operation)