xr20m1280 Exar Corporation, xr20m1280 Datasheet - Page 8

• Manufacturer Part Number: xr20m1280
• Description: I2c/spi Uart With 128-byte Fifo And Integrated Level Shifters
• Manufacturer: Exar Corporation

XR20M1280
I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
There could be many devices on the I
are eight possible slave addresses that can be selected for the XR20M1280 using the A1 and A0 address
lines.
ways to select each I2C address.
An I
UART register address being accessed. A read or write transaction is determined by bit-0 of the slave
address. If bit-0 is’0’, then it is a write transaction. If bit-0 is ’1’, then it is a read transaction. If bit-0 is a logic
1, then it is a read transaction.
After the last read or write transaction, the I
1.1.2
2
C sub-address is sent by the I
Table 1
I
2
C-bus Addressing
below shows the different addresses that can be selected. Note that there are two different
B
7:6
5:3
2:1
0
IT
VCC
VCC
VCC
VCC
GND
GND
GND
GND
SDA
SDA
SDA
SDA
SCL
SCL
SCL
SCL
A1
T
Table 2
ABLE
Reserved
UART Internal Register Address A3:A0
UART Channel Select
’00’ = UART Channel, other values are reserved
Reserved
T
ABLE
2
2: I C S
2
GND
GND
GND
GND
VCC
VCC
VCC
VCC
SDA
SDA
SDA
SDA
C master following the slave address. The sub-address contains the
SCL
SCL
SCL
SCL
C-bus. To distinguish itself from the other devices on the I
A0
below lists the functions of the bits in the I
2
1: XR20M1280 I C A
2
C-bus master will set the SCL signal back to its idle state (HIGH).
UB
PRELIMINARY
-A
DDRESS
8
F
0x6A (0110 101X)
0x6A (0110 101X)
UNCTION
0x60 (0110 000X)
0x62 (0110 001X)
0x64 (0110 010X)
0x68 (0110 100X)
0x6C (0110 110X)
0x60 (0110 000X)
0x62 (0110 001X)
0x64 (0110 010X)
0x68 (0110 100X)
0x6C (0110 110X)
0x66 (0110 011X)
0x6E (0110 111X)
0x66 (0110 011X)
0x6E (0110 111X)
2
(R
I
2
C A
EGISTER
DDRESS
DDRESS
A
M
DDRESS
AP
)
2
C sub-address.
2
C-bus, there
REV. P1.1.1