wm9701acftv Wolfson Microelectronics plc, wm9701acftv Datasheet - Page 10

• Manufacturer Part Number: wm9701acftv
• Description: Power Ac97 Multimedia Audio Codec
• Manufacturer: Wolfson Microelectronics plc

WM9701A
WOLFSON MICROELECTRONICS LTD.
Figure 7 AC’97 Standard Bi-directional Audio Frame
Figure 8 AC-link Audio Output Frame
The data streams currently defined by the AC’97 specification include:
Synchronisation of all AC-link data transactions is signalled by the WM9701A controller. WM9701A
drives the serial bit clock onto AC-link, which the AC’97 controller then qualifies with a
synchronisation signal to construct audio frames.
SYNC fixed at 48 kHz, is derived by dividing down the serial clock (BIT_CLK). BIT_CLK, fixed at
12.288 MHz, provides the necessary clocking granularity to support 12, 20-bit outgoing and incoming
time slots. AC-link serial data is transitioned on each rising edge of BIT_CLK. The receiver of AC-
link data, (WM9701A for outgoing data and the AC’97 controller for incoming data), samples each
serial bit on the falling edges of BIT_CLK.
The AC-link protocol provides for a special 16-bit time slot (slot 0) wherein each bit conveys a valid
tag for its corresponding time slot within the current audio frame. A 1 in a given bit position of slot 0
indicates that the corresponding time slot within the current audio frame has been assigned to a data
stream, and contains valid data. If a slot is “tagged” invalid, it is the responsibility of the source of the
data, (WM9701A for the input stream, AC’97 controller for the output stream); to stuff all bit positions
with 0s during that slot’s active time.
PCM playback - 2 output slots
PCM record data - 2 input slots
Control 2 output slots
Status 2 input slots
Optional modem line Codec output - 1
output slot
Optional modem line Codec input - 1
input slot
Optional dedicated microphone input -
1 input slot
SDATA_OUT
TAG PHASE
OUTGOING
INCOMING
STREAMS
STREAMS
BIT_CLK
SLOT #
SYNC
SYNC
END OF PREVIOUS
AUDIO FRAME
OUT
TAG
TAG
0
FRAME
VALID
12.288MHz
TAG PHASE
SLOT(1)
CMD
CMD
ADR
ADR
1
SLOT(2)
(’1’ = TIME SLOT CONTAINS
81.4nS
TIME SLOT ’VALID’ BITS
DATA
DATA
CMD
CMD
VALID PCM DATA)
2
SLOT(12)
LEFT
LEFT
PCM
PCM
3
’0’
RIGHT
RIGHT
PCM
PCM
’0’
4
’0’
MDM CDC
MDM CDC
2 channel composite PCM output stream
2 channel composite PCM input stream
Control register write port
Control register read port
Modem line Codec DAC input stream
(Not supported by WM9701A)
Modem line Codec ADC output stream
Dedicated microphone input stream in support of
stereo AEC, and/or other voice applications.
(Not supported by WM9701A)
OPT
OPT
(Not supported by WM9701A)
5
19
SLOT (1)
DATA PHASE
RSRVD
RSRVD
6
0
RSRVD
RSRVD
19
20.8 S (48kHz)
DATA PHASE
7
SLOT (2)
RSRVD
RSRVD
8
0
19
RSRVD
RSRVD
SLOT (3)
9
PD Rev 3.2 January 2001
RSRVD
RSRVD
10
0
RSRVD
RSRVD
Production Data
11
19
SLOT (12)
RSRVD
RSRVD
12
0
10