wm9701acftv Wolfson Microelectronics plc, wm9701acftv Datasheet - Page 9

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wm9701acftv

Manufacturer Part Number
wm9701acftv
Description
Power Ac97 Multimedia Audio Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet
Production Data
DEVICE DESCRIPTION
INTRODUCTION
CONTROL INTERFACE
AC-LINK DIGITAL SERIAL INTERFACE PROTOCOL
WOLFSON MICROELECTRONICS LTD.
WM9701A is fully compatible with Rev 1.03 of the AC’97 specification.
WM9701A comprises a stereo 18-bit Codec, (that is, 2 ADCs and 2 DACs) plus a comprehensive
analogue mixer with 4 sets of stereo inputs, plus phone, 2 microphone, and PC-beep inputs.
Additionally, on-chip reference generation circuits generate the necessary bias voltages for the
device, and a bi-directional serial interface allows transfer of control data and DAC and ADC words
to and from the AC’97 controller. WM9701A supports 18-bit resolution within the DAC and ADC
functions, but the AC’97 Codec serial interface specification allows any word length up to 20-bits to
be written to, or read from, the AC’97 Codec. These words are MSB justified, and any LSBs not used
will simply default to 0. Normally it is anticipated that 16-bit words will be used in most PC type
systems. Therefore, for the DAC, 16-bit words will be downloaded into the Codec from the controller,
along with padding of 0s to make the 16-bit word up to 20-bit length. In this case, WM9701A will
process the 16-bit word along with 0 padding bits in the 2 LSB locations (to make 18-bit). At the ADC
output, WM9701A will provide an 18-bit word, again with 0s in the two LSB locations (20-bit). The
AC’97 controller will then ignore the 4 LSBs of the 20-bit word. When WM9701A is interrogated, it
responds indicating it is an 18-bit device. However, a serial register controlled mode is available to
allow these flags to be changed, making the device appear to be a 16-bit device.
The WM9701A has the ADC and DAC functions implemented using over sampled, or ‘sigma-delta’
converters, and uses on-chip digital filters to convert these 1-bit signals to and from the 48ks/s
16/18-bit PCM words that the AC’97 controller requires. The digital parts of the device are powered
separately from the analogue to optimise performance, and 3.3V digital and 5V analogue supplies
may be used on the same device to further optimise performance. Digital levels are 5V tolerant when
the analogue supplies are 5V, so WM9701A may be connected to a controller running on 5V
supplies, but using 3.3V for the digital section of WM9701A. WM9701A is also capable of operating
with a 3.3V supply only (digital and analogue).
An internally generated mid-rail reference is provided at pin CAP2 which is used as the chip
reference. This pin should be heavily decoupled.
The WM9701A is not limited to PC-only applications. The ability to power down sections of the
device selectively, and the option to choose alternative master clock, and hence sample rates,
means that many alternative applications in areas such as telecoms, may be anticipated. Internal
connection of Pc-beep to the outputs in the case where the device is reset is supported.
A digital interface to control and transfer to and from the WM9701A has been provided. This serial
interface is compatible with the Intel AC’97 specification as illustrated in the ‘System Diagram’.
The main control interface functions are:
WM9701A incorporates a 5 pin digital serial interface that links it to the AC’97 controller. AC-link is a
bi-directional, fixed rate, serial PCM digital stream. It handles multiple input, and output audio
streams, as well as control register accesses employing a time division multiplexed (TDM) scheme.
The AC-link architecture divides each audio frame into 12 outgoing and 12 incoming data streams,
each with 20-bit sample resolution. With a minimum required DAC and ADC resolution of 16-bits,
AC’97 may also be implemented with 18 or 20-bit DAC/ADC resolution, given the headroom that the
AC-link architecture provides. WM9701A provides support for 18-bit operation.
Control of analogue gain and signal paths through the mixer.
Bi-directional transfer of ADC and DAC words to and from AC’97 controller.
Selection of power down modes.
PD Rev 3.2 January 2001
WM9701A
9

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